From patchwork Wed Jan 23 11:38:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Afzal Mohammed X-Patchwork-Id: 2024331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 8EE1F3FE4F for ; Wed, 23 Jan 2013 11:41:50 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Txyfn-0000A2-2R; Wed, 23 Jan 2013 11:39:19 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TxyfX-00005u-EG for linux-arm-kernel@lists.infradead.org; Wed, 23 Jan 2013 11:39:05 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id r0NBcvHw000899; Wed, 23 Jan 2013 05:38:58 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0NBct5q001969; Wed, 23 Jan 2013 17:08:56 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 23 Jan 2013 17:08:55 +0530 Received: from psplinux063.india.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r0NBcqKr013081; Wed, 23 Jan 2013 17:08:53 +0530 From: Afzal Mohammed To: , , Subject: [PATCH v2 1/2] clk: divider: prepare for minimum divider Date: Wed, 23 Jan 2013 17:08:52 +0530 Message-ID: <6dc1c48cac5b2646a55da3079afb72f88e40c3bc.1358937138.git.afzal@ti.com> X-Mailer: git-send-email 1.7.12 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130123_063903_605999_6FBD9934 X-CRM114-Status: GOOD ( 12.86 ) X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.152 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Stephen Boyd , Mike Turquette X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some of clocks can have a limit on minimum divider value that can be programmed, prepare for such a support. Add a new field min_div for the basic divider clock and a new dynamic clock divider registration function where minimum divider value can be specified. Keep behaviour of existing divider clock registration functions, static initialization helpers as was earlier. Signed-off-by: Afzal Mohammed --- v2: create a new registration function for those that needs to constrain minimum divider value instead of modifying existing registration functions and hence remove modification in other clock files. drivers/clk/clk-divider.c | 37 ++++++++++++++++++++++++++++++++++--- include/linux/clk-private.h | 6 +++++- include/linux/clk-provider.h | 7 +++++++ 3 files changed, 46 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index a9204c6..4025c5a 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -236,7 +236,7 @@ EXPORT_SYMBOL_GPL(clk_divider_ops); static struct clk *_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, + void __iomem *reg, u8 shift, u8 width, u8 min_div, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { @@ -244,6 +244,11 @@ static struct clk *_register_divider(struct device *dev, const char *name, struct clk *clk; struct clk_init_data init; + if (!min_div) { + pr_err("%s: minimum divider cannot be zero\n", __func__); + return ERR_PTR(-EINVAL); + } + /* allocate the divider */ div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL); if (!div) { @@ -261,6 +266,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, div->reg = reg; div->shift = shift; div->width = width; + div->min_div = min_div; div->flags = clk_divider_flags; div->lock = lock; div->hw.init = &init; @@ -276,6 +282,29 @@ static struct clk *_register_divider(struct device *dev, const char *name, } /** + * clk_register_min_divider - register a divider clock having minimum divider + * constraints with clock framework + * @dev: device registering this clock + * @name: name of this clock + * @parent_name: name of clock's parent + * @flags: framework-specific flags + * @reg: register address to adjust divider + * @shift: number of bits to shift the bitfield + * @width: width of the bitfield + * @min_div: minimum allowable divider + * @clk_divider_flags: divider-specific flags for this clock + * @lock: shared register lock for this clock + */ +struct clk *clk_register_min_divider(struct device *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, u8 min_div, + u8 clk_divider_flags, spinlock_t *lock) +{ + return _register_divider(dev, name, parent_name, flags, reg, shift, + width, min_div, clk_divider_flags, NULL, lock); +} + +/** * clk_register_divider - register a divider clock with the clock framework * @dev: device registering this clock * @name: name of this clock @@ -293,7 +322,8 @@ struct clk *clk_register_divider(struct device *dev, const char *name, u8 clk_divider_flags, spinlock_t *lock) { return _register_divider(dev, name, parent_name, flags, reg, shift, - width, clk_divider_flags, NULL, lock); + width, CLK_DIVIDER_MIN_DIV_DEFAULT, clk_divider_flags, + NULL, lock); } /** @@ -317,5 +347,6 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name, spinlock_t *lock) { return _register_divider(dev, name, parent_name, flags, reg, shift, - width, clk_divider_flags, table, lock); + width, CLK_DIVIDER_MIN_DIV_DEFAULT, clk_divider_flags, + table, lock); } diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h index 9c7f580..942a1be 100644 --- a/include/linux/clk-private.h +++ b/include/linux/clk-private.h @@ -105,7 +105,8 @@ struct clk { #define _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ _flags, _reg, _shift, _width, \ - _divider_flags, _table, _lock) \ + _min_div, _divider_flags, \ + _table, _lock) \ static struct clk _name; \ static const char *_name##_parent_names[] = { \ _parent_name, \ @@ -120,6 +121,7 @@ struct clk { .reg = _reg, \ .shift = _shift, \ .width = _width, \ + .min_div = _min_div, \ .flags = _divider_flags, \ .table = _table, \ .lock = _lock, \ @@ -132,6 +134,7 @@ struct clk { _divider_flags, _lock) \ _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ _flags, _reg, _shift, _width, \ + CLK_DIVIDER_MIN_DIV_DEFAULT, \ _divider_flags, NULL, _lock) #define DEFINE_CLK_DIVIDER_TABLE(_name, _parent_name, \ @@ -140,6 +143,7 @@ struct clk { _table, _lock) \ _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ _flags, _reg, _shift, _width, \ + CLK_DIVIDER_MIN_DIV_DEFAULT, \ _divider_flags, _table, _lock) \ #define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 4989b8a..1c09481 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -248,15 +248,22 @@ struct clk_divider { void __iomem *reg; u8 shift; u8 width; + u8 min_div; u8 flags; const struct clk_div_table *table; spinlock_t *lock; }; +#define CLK_DIVIDER_MIN_DIV_DEFAULT 1 + #define CLK_DIVIDER_ONE_BASED BIT(0) #define CLK_DIVIDER_POWER_OF_TWO BIT(1) extern const struct clk_ops clk_divider_ops; +struct clk *clk_register_min_divider(struct device *dev, const char *name, + const char *parent_name, unsigned long flags, + void __iomem *reg, u8 shift, u8 width, u8 min_div, + u8 clk_divider_flags, spinlock_t *lock); struct clk *clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width,