From patchwork Sun Sep 3 13:50:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Priit Laes X-Patchwork-Id: 9936355 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2DA95601D7 for ; Sun, 3 Sep 2017 13:52:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1D6A32862B for ; Sun, 3 Sep 2017 13:52:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11ADB28657; Sun, 3 Sep 2017 13:52:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.4 required=2.0 tests=BAYES_00,DKIM_ADSP_ALL, DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 143F62862B for ; Sun, 3 Sep 2017 13:52:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=XeI2FmbXrazRvuc7+J9lFC4vsNJ5pDeVqhUpUv6UC44=; b=DtxzhlTVk7K9DHHAWf5xtwQxr9 8ZcPOFlPy4hZ8GTpcG9X0gk6bjW99pLKiKrr0U3P5sylK1vxtfbcbvEkpW3DE1mQq65aIrtg4X1xU eT9X76NdmOSDBGlWK2MMl+tmcDJWrFqwxgUfr1lAge/YzQNJub3Lj3ZwxFShWFlR/vb7HiZzg4XRu L21XpGu1fVVj/NmdBzMTqfUTJGGnbTKUTGphxbRHNghEQ9d5heJOElNwympJzlUE4TfW0LsMrFYYQ N0RThqLsGEX0vx9Lnao2LrXAkbmaPYEsWPuSw1vNYsae30adatWY0LGG5gVK6ZIZ2xqe41GdEFFeh kved5SXg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1doVK8-0004Oy-V9; Sun, 03 Sep 2017 13:52:29 +0000 Received: from plaes.org ([188.166.43.21]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1doVJ2-0003Lz-ET for linux-arm-kernel@lists.infradead.org; Sun, 03 Sep 2017 13:51:33 +0000 Received: from localhost (85.253.197.123.cable.starman.ee [85.253.197.123]) by plaes.org (Postfix) with ESMTPSA id 7F9A441A0A; Sun, 3 Sep 2017 13:50:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=plaes.org; s=mail; t=1504446631; bh=O6Q4cENB0YpDmtEdEgbGa8C19t7mI294APBbjS7Z8HU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=aURqp6BVpKd1y/iSSEPqLJ777McyeV4XTjcY4qEDHmv67ocv0sd3asDmpwK7E9RHE TJAWJ7YCbGwxg0kvw5MbgMpDxylT3AYgHM22pbc/N5UJDg/P7hWAF56Ir2ym7/KYv7 5QpK7LGoHHhW2ARRfBLHc6QV1/1bEyhQCaWqvEOJl/+iK3xcGqwu0lzQir78ROSWlC HRNAw07pVoE+/JFEkJkHT7UYjs9LeoTB05SAb6GvYwtHtTn6r+B/VYJ2iHyxozBrtO GagubgRaOh+ztkWeleg3EL6TBoVUkSpp79ISfBu85MaN+ZTYp6T3PNKXftqFDtqMrk ISNTPrKt6HJ+g== From: Priit Laes To: Rob Herring , Mark Rutland , Russell King , Maxime Ripard , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ARM: dts: sun7i: Use defines for clock and reset indices Date: Sun, 3 Sep 2017 16:50:17 +0300 Message-Id: <6e39cfeb26b07c8fe7b8da368db39f1f0410fe26.1504446535.git-series.plaes@plaes.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170903_065121_211603_88E96E37 X-CRM114-Status: UNSURE ( 9.08 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-sunxi@googlegroups.com, Priit Laes MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We can now use defines for clock/reset indices defined in the devicetree binding include files. Signed-off-by: Priit Laes --- arch/arm/boot/dts/sun7i-a20.dtsi | 146 ++++++++++++++++---------------- 1 file changed, 74 insertions(+), 72 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index a5ca5a8..39d0727 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -47,6 +47,8 @@ #include #include #include +#include +#include / { interrupt-parent = <&gic>; @@ -64,10 +66,10 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-hdmi"; - clocks = <&ccu 56>, <&ccu 60>, - <&ccu 62>, <&ccu 144>, - <&ccu 155>, <&ccu 140>, - <&ccu 164>; + clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>, + <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>, + <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>, + <&ccu CLK_HDMI>; status = "disabled"; }; @@ -75,9 +77,9 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0"; - clocks = <&ccu 56>, <&ccu 62>, - <&ccu 144>, <&ccu 149>, - <&ccu 140>; + clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>, + <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>, + <&ccu CLK_DRAM_DE_BE0>; status = "disabled"; }; @@ -85,10 +87,10 @@ compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "de_be0-lcd0-tve0"; - clocks = <&ccu 54>, <&ccu 56>, - <&ccu 62>, - <&ccu 144>, <&ccu 155>, - <&ccu 135>, <&ccu 140>; + clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>, + <&ccu CLK_AHB_DE_BE0>, + <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>, + <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>; status = "disabled"; }; }; @@ -101,7 +103,7 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; - clocks = <&ccu 20>; + clocks = <&ccu CLK_CPU>; clock-latency = <244144>; /* 8 32k periods */ operating-points = < /* kHz uV */ @@ -280,7 +282,7 @@ compatible = "allwinner,sun4i-a10-dma"; reg = <0x01c02000 0x1000>; interrupts = ; - clocks = <&ccu 32>; + clocks = <&ccu CLK_AHB_DMA>; #dma-cells = <2>; }; @@ -288,7 +290,7 @@ compatible = "allwinner,sun4i-a10-nand"; reg = <0x01c03000 0x1000>; interrupts = ; - clocks = <&ccu 39>, <&ccu 96>; + clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 3>; dma-names = "rxtx"; @@ -301,7 +303,7 @@ compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; interrupts = ; - clocks = <&ccu 44>, <&ccu 112>; + clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 27>, <&dma SUN4I_DMA_DEDICATED 26>; @@ -316,7 +318,7 @@ compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c06000 0x1000>; interrupts = ; - clocks = <&ccu 45>, <&ccu 113>; + clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 9>, <&dma SUN4I_DMA_DEDICATED 8>; @@ -331,7 +333,7 @@ compatible = "allwinner,sun4i-a10-emac"; reg = <0x01c0b000 0x1000>; interrupts = ; - clocks = <&ccu 42>; + clocks = <&ccu CLK_AHB_EMAC>; allwinner,sram = <&emac_sram 1>; status = "disabled"; }; @@ -347,10 +349,10 @@ mmc0: mmc@01c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>; - clocks = <&ccu 34>, - <&ccu 98>, - <&ccu 99>, - <&ccu 100>; + clocks = <&ccu CLK_AHB_MMC0>, + <&ccu CLK_MMC0>, + <&ccu CLK_MMC0_OUTPUT>, + <&ccu CLK_MMC0_SAMPLE>; clock-names = "ahb", "mmc", "output", @@ -364,10 +366,10 @@ mmc1: mmc@01c10000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c10000 0x1000>; - clocks = <&ccu 35>, - <&ccu 101>, - <&ccu 102>, - <&ccu 103>; + clocks = <&ccu CLK_AHB_MMC1>, + <&ccu CLK_MMC1>, + <&ccu CLK_MMC1_OUTPUT>, + <&ccu CLK_MMC1_SAMPLE>; clock-names = "ahb", "mmc", "output", @@ -381,10 +383,10 @@ mmc2: mmc@01c11000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c11000 0x1000>; - clocks = <&ccu 36>, - <&ccu 104>, - <&ccu 105>, - <&ccu 106>; + clocks = <&ccu CLK_AHB_MMC2>, + <&ccu CLK_MMC2>, + <&ccu CLK_MMC2_OUTPUT>, + <&ccu CLK_MMC2_SAMPLE>; clock-names = "ahb", "mmc", "output", @@ -398,10 +400,10 @@ mmc3: mmc@01c12000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c12000 0x1000>; - clocks = <&ccu 37>, - <&ccu 107>, - <&ccu 108>, - <&ccu 109>; + clocks = <&ccu CLK_AHB_MMC3>, + <&ccu CLK_MMC3>, + <&ccu CLK_MMC3_OUTPUT>, + <&ccu CLK_MMC3_SAMPLE>; clock-names = "ahb", "mmc", "output", @@ -415,7 +417,7 @@ usb_otg: usb@01c13000 { compatible = "allwinner,sun4i-a10-musb"; reg = <0x01c13000 0x0400>; - clocks = <&ccu 26>; + clocks = <&ccu CLK_AHB_OTG>; interrupts = ; interrupt-names = "mc"; phys = <&usbphy 0>; @@ -430,11 +432,11 @@ compatible = "allwinner,sun7i-a20-usb-phy"; reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; reg-names = "phy_ctrl", "pmu1", "pmu2"; - clocks = <&ccu 125>; + clocks = <&ccu CLK_USB_PHY>; clock-names = "usb_phy"; - resets = <&ccu 1>, - <&ccu 2>, - <&ccu 3>; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>, + <&ccu RST_USB_PHY2>; reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; status = "disabled"; }; @@ -443,7 +445,7 @@ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; reg = <0x01c14000 0x100>; interrupts = ; - clocks = <&ccu 27>; + clocks = <&ccu CLK_AHB_EHCI0>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -453,7 +455,7 @@ compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; reg = <0x01c14400 0x100>; interrupts = ; - clocks = <&ccu 123>, <&ccu 28>; + clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; phys = <&usbphy 1>; phy-names = "usb"; status = "disabled"; @@ -464,7 +466,7 @@ "allwinner,sun4i-a10-crypto"; reg = <0x01c15000 0x1000>; interrupts = ; - clocks = <&ccu 31>, <&ccu 111>; + clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>; clock-names = "ahb", "mod"; }; @@ -472,7 +474,7 @@ compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c17000 0x1000>; interrupts = ; - clocks = <&ccu 46>, <&ccu 114>; + clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 29>, <&dma SUN4I_DMA_DEDICATED 28>; @@ -487,7 +489,7 @@ compatible = "allwinner,sun4i-a10-ahci"; reg = <0x01c18000 0x1000>; interrupts = ; - clocks = <&ccu 49>, <&ccu 122>; + clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>; status = "disabled"; }; @@ -495,7 +497,7 @@ compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; reg = <0x01c1c000 0x100>; interrupts = ; - clocks = <&ccu 29>; + clocks = <&ccu CLK_AHB_EHCI1>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -505,7 +507,7 @@ compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; reg = <0x01c1c400 0x100>; interrupts = ; - clocks = <&ccu 124>, <&ccu 30>; + clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; phys = <&usbphy 2>; phy-names = "usb"; status = "disabled"; @@ -515,7 +517,7 @@ compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c1f000 0x1000>; interrupts = ; - clocks = <&ccu 47>, <&ccu 127>; + clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 31>, <&dma SUN4I_DMA_DEDICATED 30>; @@ -539,7 +541,7 @@ compatible = "allwinner,sun7i-a20-pinctrl"; reg = <0x01c20800 0x400>; interrupts = ; - clocks = <&ccu 74>, <&osc24M>, <&osc32k>; + clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>; clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; @@ -810,7 +812,7 @@ compatible = "allwinner,sun4i-a10-spdif"; reg = <0x01c21000 0x400>; interrupts = ; - clocks = <&ccu 70>, <&ccu 120>; + clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>; clock-names = "apb", "spdif"; dmas = <&dma SUN4I_DMA_NORMAL 2>, <&dma SUN4I_DMA_NORMAL 2>; @@ -820,7 +822,7 @@ ir0: ir@01c21800 { compatible = "allwinner,sun4i-a10-ir"; - clocks = <&ccu 75>, <&ccu 116>; + clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>; clock-names = "apb", "ir"; interrupts = ; reg = <0x01c21800 0x40>; @@ -829,7 +831,7 @@ ir1: ir@01c21c00 { compatible = "allwinner,sun4i-a10-ir"; - clocks = <&ccu 76>, <&ccu 117>; + clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>; clock-names = "apb", "ir"; interrupts = ; reg = <0x01c21c00 0x40>; @@ -841,7 +843,7 @@ compatible = "allwinner,sun4i-a10-i2s"; reg = <0x01c22000 0x400>; interrupts = ; - clocks = <&ccu 73>, <&ccu 128>; + clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>; clock-names = "apb", "mod"; dmas = <&dma SUN4I_DMA_NORMAL 4>, <&dma SUN4I_DMA_NORMAL 4>; @@ -854,7 +856,7 @@ compatible = "allwinner,sun4i-a10-i2s"; reg = <0x01c22400 0x400>; interrupts = ; - clocks = <&ccu 71>, <&ccu 118>; + clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>; clock-names = "apb", "mod"; dmas = <&dma SUN4I_DMA_NORMAL 3>, <&dma SUN4I_DMA_NORMAL 3>; @@ -874,7 +876,7 @@ compatible = "allwinner,sun7i-a20-codec"; reg = <0x01c22c00 0x40>; interrupts = ; - clocks = <&ccu 69>, <&ccu 160>; + clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>; clock-names = "apb", "codec"; dmas = <&dma SUN4I_DMA_NORMAL 19>, <&dma SUN4I_DMA_NORMAL 19>; @@ -892,7 +894,7 @@ compatible = "allwinner,sun4i-a10-i2s"; reg = <0x01c24400 0x400>; interrupts = ; - clocks = <&ccu 77>, <&ccu 129>; + clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>; clock-names = "apb", "mod"; dmas = <&dma SUN4I_DMA_NORMAL 6>, <&dma SUN4I_DMA_NORMAL 6>; @@ -913,7 +915,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 88>; + clocks = <&ccu CLK_APB1_UART0>; status = "disabled"; }; @@ -923,7 +925,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 89>; + clocks = <&ccu CLK_APB1_UART1>; status = "disabled"; }; @@ -933,7 +935,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 90>; + clocks = <&ccu CLK_APB1_UART2>; status = "disabled"; }; @@ -943,7 +945,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 91>; + clocks = <&ccu CLK_APB1_UART3>; status = "disabled"; }; @@ -953,7 +955,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 92>; + clocks = <&ccu CLK_APB1_UART4>; status = "disabled"; }; @@ -963,7 +965,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 93>; + clocks = <&ccu CLK_APB1_UART5>; status = "disabled"; }; @@ -973,7 +975,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 94>; + clocks = <&ccu CLK_APB1_UART6>; status = "disabled"; }; @@ -983,7 +985,7 @@ interrupts = ; reg-shift = <2>; reg-io-width = <4>; - clocks = <&ccu 95>; + clocks = <&ccu CLK_APB1_UART7>; status = "disabled"; }; @@ -991,7 +993,7 @@ compatible = "allwinner,sun4i-a10-ps2"; reg = <0x01c2a000 0x400>; interrupts = ; - clocks = <&ccu 85>; + clocks = <&ccu CLK_APB1_PS20>; status = "disabled"; }; @@ -999,7 +1001,7 @@ compatible = "allwinner,sun4i-a10-ps2"; reg = <0x01c2a400 0x400>; interrupts = ; - clocks = <&ccu 86>; + clocks = <&ccu CLK_APB1_PS21>; status = "disabled"; }; @@ -1008,7 +1010,7 @@ "allwinner,sun4i-a10-i2c"; reg = <0x01c2ac00 0x400>; interrupts = ; - clocks = <&ccu 79>; + clocks = <&ccu CLK_APB1_I2C0>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -1019,7 +1021,7 @@ "allwinner,sun4i-a10-i2c"; reg = <0x01c2b000 0x400>; interrupts = ; - clocks = <&ccu 80>; + clocks = <&ccu CLK_APB1_I2C1>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -1030,7 +1032,7 @@ "allwinner,sun4i-a10-i2c"; reg = <0x01c2b400 0x400>; interrupts = ; - clocks = <&ccu 81>; + clocks = <&ccu CLK_APB1_I2C2>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -1041,7 +1043,7 @@ "allwinner,sun4i-a10-i2c"; reg = <0x01c2b800 0x400>; interrupts = ; - clocks = <&ccu 82>; + clocks = <&ccu CLK_APB1_I2C3>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -1052,7 +1054,7 @@ "allwinner,sun4i-a10-can"; reg = <0x01c2bc00 0x400>; interrupts = ; - clocks = <&ccu 83>; + clocks = <&ccu CLK_APB1_CAN>; status = "disabled"; }; @@ -1061,7 +1063,7 @@ "allwinner,sun4i-a10-i2c"; reg = <0x01c2c000 0x400>; interrupts = ; - clocks = <&ccu 87>; + clocks = <&ccu CLK_APB1_I2C4>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -1072,7 +1074,7 @@ reg = <0x01c50000 0x10000>; interrupts = ; interrupt-names = "macirq"; - clocks = <&ccu 66>, <&gmac_tx_clk>; + clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>; clock-names = "stmmaceth", "allwinner_gmac_tx"; snps,pbl = <2>; snps,fixed-burst; @@ -1089,7 +1091,7 @@ , , ; - clocks = <&ccu 51>; + clocks = <&ccu CLK_AHB_HSTIMER>; }; gic: interrupt-controller@01c81000 {