From patchwork Wed Oct 18 08:28:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 10014119 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A451860215 for ; Wed, 18 Oct 2017 08:31:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9189928AAE for ; Wed, 18 Oct 2017 08:31:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8697328AF8; Wed, 18 Oct 2017 08:31:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1F52F28AF2 for ; Wed, 18 Oct 2017 08:31:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uWD700Bodg+MihS4NMeO52dURCPeF1tW16XE0HGcncY=; b=sLF7kjEjosbpGP tcdQC6qyj2RQQYVKPbbHdVk0xRDqPg5+vSNtcKpLXY3KjXGzomTZHQRLQyTwkGoRrtw6xK+0DfxhV QLoK/pUGVbbxA1bkUdPpJqEo6mTRU/DBFy3LPb+PTTwgkxXfhLXPHgesi2behXn92JqemdG+/xowB 9nTveJ66W1NstXBQbvAvTQu3y0pLES1fpLvTmzZjvDc+K4gES4aKkCkE7x+WW4lOZxp460U9npQOr t3Kk04ghXhIB/MmUqrClAc2qgkvEFDRUd5njLGVEQHZqmlnD9pEK9XzimbbVV8Si0aAwHKBz5WnyT 9fEQiqnqAE80p+Gy89WQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1e4jl0-0007i7-53; Wed, 18 Oct 2017 08:31:18 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1e4jj8-0004Qi-Qi; Wed, 18 Oct 2017 08:29:30 +0000 X-UUID: b9f6f00986364ef2970f465bf39823df-20171018 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2124201958; Wed, 18 Oct 2017 16:28:58 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 18 Oct 2017 16:28:57 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 18 Oct 2017 16:28:57 +0800 From: To: , , , , Subject: [PATCH v6 6/7] soc: mediatek: pwrap: add common way for setup CS timing extenstion Date: Wed, 18 Oct 2017 16:28:47 +0800 Message-ID: <7244413bf198a778c42500250d8da5a73a8b81d8.1508313105.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171018_012923_521881_5801CED6 X-CRM114-Status: GOOD ( 16.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: chenglin.xu@mediatek.com, Sean Wang , chen.zhong@mediatek.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Wang Multiple platforms would always use their own way handling CS timing extension on the bus which leads to a little bit code duplication. Therefore, the patch groups the similar logic to handle CS timing extension into the common function which allows the following SoCs have more reusability for configing CS timing. Signed-off-by: Chenglin Xu Signed-off-by: Sean Wang --- drivers/soc/mediatek/mtk-pmic-wrap.c | 59 ++++++++++++++++++++++-------------- 1 file changed, 37 insertions(+), 22 deletions(-) diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c index 45c3e44..cbc3f0e 100644 --- a/drivers/soc/mediatek/mtk-pmic-wrap.c +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c @@ -827,23 +827,44 @@ static int pwrap_init_dual_io(struct pmic_wrapper *wrp) return 0; } -static int pwrap_mt8135_init_reg_clock(struct pmic_wrapper *wrp) +/* + * pwrap_init_chip_select_ext is used to configure CS extension time for each + * phase during data transactions on the pwrap bus. + */ +static void pwrap_init_chip_select_ext(struct pmic_wrapper *wrp, u8 hext_write, + u8 hext_read, u8 lext_start, + u8 lext_end) { - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT); - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE); - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ); - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_START); - pwrap_writel(wrp, 0x0, PWRAP_CSLEXT_END); + /* + * After finishing a write and read transaction, extends CS high time + * to be at least xT of BUS CLK as hext_write and hext_read specifies + * respectively. + */ + pwrap_writel(wrp, hext_write, PWRAP_CSHEXT_WRITE); + pwrap_writel(wrp, hext_read, PWRAP_CSHEXT_READ); - return 0; + /* + * Extends CS low time after CSL and before CSH command to be at + * least xT of BUS CLK as lext_start and lext_end specifies + * respectively. + */ + pwrap_writel(wrp, lext_start, PWRAP_CSLEXT_START); + pwrap_writel(wrp, lext_end, PWRAP_CSLEXT_END); } -static int pwrap_mt8173_init_reg_clock(struct pmic_wrapper *wrp) +static int pwrap_common_init_reg_clock(struct pmic_wrapper *wrp) { - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_WRITE); - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_READ); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END); + switch (wrp->master->type) { + case PWRAP_MT8173: + pwrap_init_chip_select_ext(wrp, 0, 4, 2, 2); + break; + case PWRAP_MT8135: + pwrap_writel(wrp, 0x4, PWRAP_CSHEXT); + pwrap_init_chip_select_ext(wrp, 0, 4, 0, 0); + break; + default: + break; + } return 0; } @@ -853,20 +874,14 @@ static int pwrap_mt2701_init_reg_clock(struct pmic_wrapper *wrp) switch (wrp->slave->type) { case PMIC_MT6397: pwrap_writel(wrp, 0xc, PWRAP_RDDMY); - pwrap_writel(wrp, 0x4, PWRAP_CSHEXT_WRITE); - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END); + pwrap_init_chip_select_ext(wrp, 4, 0, 2, 2); break; case PMIC_MT6323: pwrap_writel(wrp, 0x8, PWRAP_RDDMY); pwrap_write(wrp, wrp->slave->dew_regs[PWRAP_DEW_RDDMY_NO], 0x8); - pwrap_writel(wrp, 0x5, PWRAP_CSHEXT_WRITE); - pwrap_writel(wrp, 0x0, PWRAP_CSHEXT_READ); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_START); - pwrap_writel(wrp, 0x2, PWRAP_CSLEXT_END); + pwrap_init_chip_select_ext(wrp, 5, 0, 2, 2); break; default: break; @@ -1235,7 +1250,7 @@ static const struct pmic_wrapper_type pwrap_mt8135 = { .spi_w = PWRAP_MAN_CMD_SPI_WRITE, .wdt_src = PWRAP_WDT_SRC_MASK_ALL, .has_bridge = 1, - .init_reg_clock = pwrap_mt8135_init_reg_clock, + .init_reg_clock = pwrap_common_init_reg_clock, .init_soc_specific = pwrap_mt8135_init_soc_specific, }; @@ -1247,7 +1262,7 @@ static const struct pmic_wrapper_type pwrap_mt8173 = { .spi_w = PWRAP_MAN_CMD_SPI_WRITE, .wdt_src = PWRAP_WDT_SRC_MASK_NO_STAUPD, .has_bridge = 0, - .init_reg_clock = pwrap_mt8173_init_reg_clock, + .init_reg_clock = pwrap_common_init_reg_clock, .init_soc_specific = pwrap_mt8173_init_soc_specific, };