Message ID | 76b91f88120fc8c3e5923d6432a1d537ee584fc8.1605046192.git.andreyknvl@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v9,01/44] kasan: drop unnecessary GPL text from comment headers | expand |
On Tue, Nov 10, 2020 at 11:12 PM Andrey Konovalov <andreyknvl@google.com> wrote: > > Hardware tag-based KASAN uses the memory tagging approach, which requires > all allocations to be aligned to the memory granule size. Align the > allocations to MTE_GRANULE_SIZE via ARCH_SLAB_MINALIGN when > CONFIG_KASAN_HW_TAGS is enabled. > > Signed-off-by: Andrey Konovalov <andreyknvl@google.com> > Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Alexander Potapenko <glider@google.com> > --- > Change-Id: I51ebd3f9645e6330e5a92973bf7c86b62d632c2b > --- > arch/arm64/include/asm/cache.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h > index 63d43b5f82f6..77cbbe3625f2 100644 > --- a/arch/arm64/include/asm/cache.h > +++ b/arch/arm64/include/asm/cache.h > @@ -6,6 +6,7 @@ > #define __ASM_CACHE_H > > #include <asm/cputype.h> > +#include <asm/mte-kasan.h> > > #define CTR_L1IP_SHIFT 14 > #define CTR_L1IP_MASK 3 > @@ -51,6 +52,8 @@ > > #ifdef CONFIG_KASAN_SW_TAGS > #define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) > +#elif defined(CONFIG_KASAN_HW_TAGS) > +#define ARCH_SLAB_MINALIGN MTE_GRANULE_SIZE > #endif > > #ifndef __ASSEMBLY__ > -- > 2.29.2.222.g5d2a92d10f8-goog >
diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h index 63d43b5f82f6..77cbbe3625f2 100644 --- a/arch/arm64/include/asm/cache.h +++ b/arch/arm64/include/asm/cache.h @@ -6,6 +6,7 @@ #define __ASM_CACHE_H #include <asm/cputype.h> +#include <asm/mte-kasan.h> #define CTR_L1IP_SHIFT 14 #define CTR_L1IP_MASK 3 @@ -51,6 +52,8 @@ #ifdef CONFIG_KASAN_SW_TAGS #define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) +#elif defined(CONFIG_KASAN_HW_TAGS) +#define ARCH_SLAB_MINALIGN MTE_GRANULE_SIZE #endif #ifndef __ASSEMBLY__