@@ -189,6 +189,171 @@
};
};
+ /* GDMA */
+ fpd_dma_chan1: dma@fd500000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd500000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 124 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan2: dma@fd510000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd510000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 125 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan3: dma@fd520000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd520000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 126 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan4: dma@fd530000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd530000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 127 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan5: dma@fd540000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd540000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 128 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan6: dma@fd550000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd550000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 129 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan7: dma@fd560000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd560000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 130 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ fpd_dma_chan8: dma@fd570000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xfd570000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 131 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <128>;
+ };
+
+ /* LPDDMA default allows only secured access. inorder to enable
+ * These dma channels, Users should ensure that these dma
+ * Channels are allowed for non secure access.
+ */
+ lpd_dma_chan1: dma@ffa80000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffa80000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 77 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan2: dma@ffa90000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffa90000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 78 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan3: dma@ffaa0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffaa0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 79 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan4: dma@ffab0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffab0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 80 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan5: dma@ffac0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffac0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 81 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan6: dma@ffad0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffad0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 82 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan7: dma@ffae0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffae0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 83 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
+ lpd_dma_chan8: dma@ffaf0000 {
+ status = "disabled";
+ compatible = "xlnx,zynqmp-dma-1.0";
+ reg = <0x0 0xffaf0000 0x0 0x1000>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 84 4>;
+ clock-names = "clk_main", "clk_apb";
+ xlnx,bus-width = <64>;
+ };
+
gem0: ethernet@ff0b0000 {
compatible = "cdns,gem";
status = "disabled";
Wire fpd and lpd dma channels to zynqmp.dtsi. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 165 +++++++++++++++++++++++++++++++++ 1 file changed, 165 insertions(+)