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Mon, 13 May 2019 05:32:09 +0000 From: Leonard Crestez To: Jacky Bai , Stephen Boyd , Shawn Guo Subject: [PATCH 2/2] clk: imx8mm: Add gic clk Thread-Topic: [PATCH 2/2] clk: imx8mm: Add gic clk Thread-Index: AQHVCU01EyZHs5LfbkitpXnJBrxJyw== Date: Mon, 13 May 2019 05:32:09 +0000 Message-ID: <7e1ffa50b8e2e95ec415c7b46b5ef83b0ec46e2d.1557725494.git.leonard.crestez@nxp.com> References: <61a5cad23ad56a2aed96f3bdbf7c67df25e0bd6b.1557725494.git.leonard.crestez@nxp.com> In-Reply-To: <61a5cad23ad56a2aed96f3bdbf7c67df25e0bd6b.1557725494.git.leonard.crestez@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [89.37.124.34] x-mailer: git-send-email 2.17.1 x-clientproxiedby: LO2P265CA0125.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:9f::17) To AM0PR04MB6434.eurprd04.prod.outlook.com (2603:10a6:208:16c::23) authentication-results: spf=none (sender IP is ) smtp.mailfrom=leonard.crestez@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: f7f3c492-33de-4fcf-bc54-08d6d7645796 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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In some out-of-tree DVFS the gic clock can end up as the only user of sys_pll2 so if we don't define the gic clk explicitly it might be turned off. Signed-off-by: Leonard Crestez --- I'm not sure adding clks from the reference manual needs justification. --- drivers/clk/imx/clk-imx8mm.c | 4 ++++ include/dt-bindings/clock/imx8mm-clock.h | 3 ++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index fbb61c2f12d0..8b2f0013639d 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -286,10 +286,13 @@ static const char *imx8mm_usb_core_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pl "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; static const char *imx8mm_usb_phy_sels[] = {"osc_24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; +static const char *imx8mm_gic_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll2_100m", + "sys_pll1_800m", "clk_ext2", "clk_ext4", "audio_pll2_out" }; + static const char *imx8mm_ecspi1_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; static const char *imx8mm_ecspi2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; @@ -556,10 +559,11 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) clks[IMX8MM_CLK_UART2] = imx8m_clk_composite("uart2", imx8mm_uart2_sels, base + 0xaf80); clks[IMX8MM_CLK_UART3] = imx8m_clk_composite("uart3", imx8mm_uart3_sels, base + 0xb000); clks[IMX8MM_CLK_UART4] = imx8m_clk_composite("uart4", imx8mm_uart4_sels, base + 0xb080); clks[IMX8MM_CLK_USB_CORE_REF] = imx8m_clk_composite("usb_core_ref", imx8mm_usb_core_sels, base + 0xb100); clks[IMX8MM_CLK_USB_PHY_REF] = imx8m_clk_composite("usb_phy_ref", imx8mm_usb_phy_sels, base + 0xb180); + clks[IMX8MM_CLK_GIC] = imx8m_clk_composite_critical("gic", imx8mm_gic_sels, base + 0xb200); clks[IMX8MM_CLK_ECSPI1] = imx8m_clk_composite("ecspi1", imx8mm_ecspi1_sels, base + 0xb280); clks[IMX8MM_CLK_ECSPI2] = imx8m_clk_composite("ecspi2", imx8mm_ecspi2_sels, base + 0xb300); clks[IMX8MM_CLK_PWM1] = imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380); clks[IMX8MM_CLK_PWM2] = imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400); clks[IMX8MM_CLK_PWM3] = imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480); diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h index 1b4353e7b486..26f3ad3fbf5d 100644 --- a/include/dt-bindings/clock/imx8mm-clock.h +++ b/include/dt-bindings/clock/imx8mm-clock.h @@ -236,9 +236,10 @@ #define IMX8MM_CLK_DRAM_CORE 220 #define IMX8MM_CLK_DRAM_ALT_ROOT 221 #define IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK 222 +#define IMX8MM_CLK_GIC 223 -#define IMX8MM_CLK_END 223 +#define IMX8MM_CLK_END 224 #endif