From patchwork Thu Jan 21 10:26:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 12035485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D220AC433E0 for ; Thu, 21 Jan 2021 10:29:18 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5F693204EF for ; Thu, 21 Jan 2021 10:29:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5F693204EF Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=XT/8L0tXgRNPBR1Ng2t+++vINBzShy9q54gqGC75Ucc=; b=lKwZW4+WojzSYFInUurOLGyge /mzD7TkVdB55qFKiNJWZ5O3CBS9DtgP87vb2OelMuoKb/5F11c3DisJM3jt3trC7Q6oKAShmKvVEg hsq5wFdpAId+JOQy094qX4awva1ywEoQHybSUXyA8uqNp42L4L2vc9LmO+NhAw3OZ1WmuviMOgzO3 ThgIEJgRuMPTgSPcEtAdes8kvivJDjluC6iRNJ4jXFdW1GnqsrfT84IMwX2Yne5rLaT+M/6qDHYRM SE2JL7U8Dl+9Og4fkElVRFnMoXUV1v0IyY3U0q7vEmTk64YSlqW1TcOJK/Wfs8YKGvDU+4di7uPZR xoZ9IGD4w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2XBk-0004KJ-He; Thu, 21 Jan 2021 10:27:40 +0000 Received: from mail-ej1-x635.google.com ([2a00:1450:4864:20::635]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1l2XBL-0004BS-MF for linux-arm-kernel@lists.infradead.org; Thu, 21 Jan 2021 10:27:17 +0000 Received: by mail-ej1-x635.google.com with SMTP id kg20so1374083ejc.4 for ; Thu, 21 Jan 2021 02:27:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Vr+TeRCEd/es2ypf0pZcHtu1JbAC7tTtccdv1K53z90=; b=m5owuoT53/nJkvxi3a+HWaGFuvhItn8fp9QD1TnR4w+WVygtHMCki6VnRakFIm4ONh RzhsQqqMBhGf+sRk+Tv96T2QHlv0MTSljk0Lx4nG+PC6dMRf6f9+n1a8pBOSoD3Z2+0G cIIrFQPSqKhBFkgQ06dKyaWacDzUDm9wnMYURUdC2Zka0gA4Y87XOByAQkHmjn8E1DUH Zce/JGmnYqRFLtterj03RLP824pRq/ybOiF/W7nC66d6WzRF8jQJZhftHJmo5/bNFLB1 nxZo3ZWfqAyljsgViYoYRPtnOe0H9EoFu4W70Mkq0qzMNHyza/JOlLtVQTV71dkbyB0K dtcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Vr+TeRCEd/es2ypf0pZcHtu1JbAC7tTtccdv1K53z90=; b=WraEPVFJcCBJUun7C2w0RVbOUHhAgYDUCdZgA2wd+u5nN+Z37qM2JfskCtKn9bYW4m dUqGE7b14fmu440S5mWdYgFDrIcr6UTnpgr+4INNdtpgc2Zph3z7SOjJ0RpOFLeXJkDv /ssO2xNfYCjWr30VAwSARjicQ3SC2JB3iXmhswjgMKESEP1fpz5Hh37xnq9BVMAOhW12 ZDA9etArvYfUmzkIPFYR5GopLJEcdHCGl2QEz6iEnBzxyLAXalOizTi1QBbji1FNbqwt PKPuA+CvSXck8RqCBPmaGmD5d3SNQoV1G+4nI7EpH59kNllPokU4vbpjwwlKILQAmjay GLCw== X-Gm-Message-State: AOAM530qClCFgMDQhmRteFmsl3UbsE4PbePTaFImItc51aJHf4CiL1YV aJEsbxdO7DtWb5hZbl3IMe64Tskl2gIbNKBP X-Google-Smtp-Source: ABdhPJzlbZ2UYdqKj341iVcPZ4qwO9MApLYuQsw9mnxN0GtqobAUE5U513lgz4ato4mUj+F2qQHALQ== X-Received: by 2002:a17:906:4d8f:: with SMTP id s15mr8859438eju.389.1611224834281; Thu, 21 Jan 2021 02:27:14 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id e10sm2026339ejx.48.2021.01.21.02.27.13 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Jan 2021 02:27:13 -0800 (PST) From: Michal Simek To: linux-kernel@vger.kernel.org, monstr@monstr.eu, michal.simek@xilinx.com, git@xilinx.com Subject: [PATCH v2 05/12] arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 Date: Thu, 21 Jan 2021 11:26:53 +0100 Message-Id: <80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.30.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210121_052716_340263_5B99F0A6 X-CRM114-Status: GOOD ( 14.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable psgtr driver and write clocks property to get sata to work. Signed-off-by: Michal Simek --- Changes in v2: None .../boot/dts/xilinx/zynqmp-zcu102-revA.dts | 10 +++++++ .../boot/dts/xilinx/zynqmp-zcu104-revA.dts | 28 +++++++++++++++++++ .../boot/dts/xilinx/zynqmp-zcu106-revA.dts | 10 +++++++ .../boot/dts/xilinx/zynqmp-zcu111-revA.dts | 10 +++++++ 4 files changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts index 68c2ad30d62d..d92698ffbf8c 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include / { model = "ZynqMP ZCU102 RevA"; @@ -663,6 +664,13 @@ &pcie { status = "okay"; }; +&psgtr { + status = "okay"; + /* pcie, sata, usb3, dp */ + clocks = <&si5341 0 5>, <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>; + clock-names = "ref0", "ref1", "ref2", "ref3"; +}; + &rtc { status = "okay"; }; @@ -678,6 +686,8 @@ &sata { ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; }; /* SD1 with level shifter */ diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts index 7a4614e3f5fa..5e2be9abc175 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts @@ -12,6 +12,7 @@ #include "zynqmp.dtsi" #include "zynqmp-clk-ccf.dtsi" #include +#include / { model = "ZynqMP ZCU104 RevA"; @@ -36,6 +37,24 @@ memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; + + clock_8t49n287_5: clk125 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + + clock_8t49n287_2: clk26 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clock_8t49n287_3: clk27 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; }; &can1 { @@ -158,6 +177,13 @@ &rtc { status = "okay"; }; +&psgtr { + status = "okay"; + /* nc, sata, usb3, dp */ + clocks = <&clock_8t49n287_5>, <&clock_8t49n287_2>, <&clock_8t49n287_3>; + clock-names = "ref1", "ref2", "ref3"; +}; + &sata { status = "okay"; /* SATA OOB timing settings */ @@ -169,6 +195,8 @@ &sata { ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; }; /* SD1 with level shifter */ diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts index a29ff20090ce..4ec6715abab7 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include / { model = "ZynqMP ZCU106 RevA"; @@ -658,6 +659,13 @@ i2c@7 { }; }; +&psgtr { + status = "okay"; + /* nc, sata, usb3, dp */ + clocks = <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>; + clock-names = "ref1", "ref2", "ref3"; +}; + &rtc { status = "okay"; }; @@ -673,6 +681,8 @@ &sata { ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; }; /* SD1 with level shifter */ diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts index 92b3cee62d11..2969c4b71384 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts @@ -13,6 +13,7 @@ #include "zynqmp-clk-ccf.dtsi" #include #include +#include / { model = "ZynqMP ZCU111 RevA"; @@ -541,6 +542,13 @@ i2c@7 { }; }; +&psgtr { + status = "okay"; + /* nc, sata, usb3, dp */ + clocks = <&si5341 0 3>, <&si5341 0 2>, <&si5341 0 0>; + clock-names = "ref1", "ref2", "ref3"; +}; + &rtc { status = "okay"; }; @@ -556,6 +564,8 @@ &sata { ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + phy-names = "sata-phy"; + phys = <&psgtr 3 PHY_TYPE_SATA 1 1>; }; /* SD1 with level shifter */