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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id w31-v6sm24158639wrb.93.2018.05.02.04.53.14 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 02 May 2018 04:53:15 -0700 (PDT) From: Michal Simek To: devicetree@vger.kernel.org Subject: [PATCH] arm64: zynqmp: Add support for Avnet Ultra96 rev1 board Date: Wed, 2 May 2018 13:53:14 +0200 Message-Id: <80d21c84d427cb6b4122efd3dea7f1c4ab4cf2be.1525261987.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.17.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180502_075330_492015_00BC4ECF X-CRM114-Status: GOOD ( 18.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , monstr@monstr.eu, Arnd Bergmann , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Avnet Ultra96 rev1 board is commercialized Xilinx zcu100 revC/D internal board. The patch is reusing zcu100 revC files but changing model description and compatible strings which are used for example by libmraa. Signed-off-by: Michal Simek --- I choose this option because there are houndreds of zcu100 boards created and this will enable support both versions. Record avnet prefix was sent by separate patch. --- arch/arm64/boot/dts/xilinx/Makefile | 1 + .../boot/dts/xilinx/avnet-ultra96-rev1.dts | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dts diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile index d452f80e7601..60f5443f3ef4 100644 --- a/arch/arm64/boot/dts/xilinx/Makefile +++ b/arch/arm64/boot/dts/xilinx/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_ZYNQMP) += avnet-ultra96-rev1.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1232-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1254-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1275-revA.dtb diff --git a/arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dts b/arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dts new file mode 100644 index 000000000000..88aa06fa78a8 --- /dev/null +++ b/arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Avnet Ultra96 rev1 + * + * (C) Copyright 2018, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp-zcu100-revC.dts" + +/ { + model = "Avnet Ultra96 Rev1"; + compatible = "avnet,ultra96-rev1", "avnet,ultra96", + "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", + "xlnx,zynqmp"; +};