From patchwork Thu Sep 10 20:53:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Jarzmik X-Patchwork-Id: 7155871 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5DEFCBEEC1 for ; Thu, 10 Sep 2015 21:00:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 82FE320435 for ; Thu, 10 Sep 2015 21:00:47 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AAA9920375 for ; Thu, 10 Sep 2015 21:00:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Za8vw-0002MB-Kq; Thu, 10 Sep 2015 20:59:04 +0000 Received: from smtp11.smtpout.orange.fr ([80.12.242.133] helo=smtp.smtpout.orange.fr) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Za8vt-00025Y-5G for linux-arm-kernel@lists.infradead.org; Thu, 10 Sep 2015 20:59:02 +0000 Received: from belgarion ([109.220.179.182]) by mwinf5d46 with ME id FYyV1r00F3wWvkl03YyWRF; Thu, 10 Sep 2015 22:58:38 +0200 X-ME-Helo: belgarion X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Thu, 10 Sep 2015 22:58:38 +0200 X-ME-IP: 109.220.179.182 From: Robert Jarzmik To: Russell King - ARM Linux Subject: Re: [PATCH] ARM: fix alignement of __bug_table section entries References: <87y4gkx04m.fsf@belgarion.home> <20150905203818.GO21084@n2100.arm.linux.org.uk> <87lhcjwjde.fsf@belgarion.home> <20150906194805.GP21084@n2100.arm.linux.org.uk> <87egibw7yh.fsf@belgarion.home> <20150906235414.GQ21084@n2100.arm.linux.org.uk> <877fo0x2ur.fsf@belgarion.home> <20150908200809.GC21084@n2100.arm.linux.org.uk> <87mvwvurae.fsf@belgarion.home> <87egi6umi2.fsf@belgarion.home> <20150910191652.GJ21084@n2100.arm.linux.org.uk> X-URL: http://belgarath.falguerolles.org/ Date: Thu, 10 Sep 2015 22:53:43 +0200 Message-ID: <8737ymuhbc.fsf@belgarion.home> User-Agent: Gnus/5.130008 (Ma Gnus v0.8) Emacs/24.4 (gnu/linux) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150910_135901_515910_2AE0FBDD X-CRM114-Status: GOOD ( 21.29 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Russell King - ARM Linux writes: > I've been wondering whether we can teach GCC that set_domain modifies > the value that get_domain returns, rather than throwing a volatile > onto the asm in get_domain. The issue with a volatile there is that > even if the result is unused, but the code is reachable, gcc still has > to output the code to read the register. > > We might be able to get away with a memory clobber on the set_domain, > and fake a memory read in get_domain, eg, by passing > "m" (current_thread_info()->cpu_domain)) > to the get_domain asm. Ok, let's say we do it that way. I have some concerns about it: (a) I see an inbalance, as set_domain() doesn't actually modify current_thread_info()->cpu_domain. I don't see how it will protect use from this scenario : - get_domain() - set_domain() - set_domain() (b) domain.h is included from thread_info.h, not the other way around => current_thread_info() is not accessible from domain.h => that would require a bit of moving things around, as thread_info structure description should be available for example. This is currently my biggest problem with this approach. (c) I was also wondering if a case like this could happen : - a function foo() does a get_domain() => an exception/irq whatever happens and modifies the DACR - foo() continues a makes a modify_domain() => and here the modify_domain() uses the old DACR value Or said differently, I wonder if there is a case of 2 get_domain() calls in a row with a DACR modification in between. I What about something such as [1], without a memory clobber, but a "fake" memory variable link ? Cheers. --- Robert [1] get_domain() / set_domain() link diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h index e878129f2fee..fc1d9c43aa08 100644 --- a/arch/arm/include/asm/domain.h +++ b/arch/arm/include/asm/domain.h @@ -83,13 +83,17 @@ #ifndef __ASSEMBLY__ +static int domain_barrier; +/* + * how to get the current stack pointer in C + */ static inline unsigned int get_domain(void) { unsigned int domain; asm( "mrc p15, 0, %0, c3, c0 @ get domain" - : "=r" (domain)); + : "=r" (domain), "=m" (domain_barrier)); return domain; } @@ -97,8 +101,8 @@ static inline unsigned int get_domain(void) static inline void set_domain(unsigned val) { asm volatile( - "mcr p15, 0, %0, c3, c0 @ set domain" - : : "r" (val)); + "mcr p15, 0, %1, c3, c0 @ set domain" + : "=m" (domain_barrier) : "r" (val)); isb(); }