From patchwork Sun Sep 6 21:31:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Jarzmik X-Patchwork-Id: 7132651 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B6C20BEEC1 for ; Sun, 6 Sep 2015 21:38:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 903BE20685 for ; Sun, 6 Sep 2015 21:38:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8887720625 for ; Sun, 6 Sep 2015 21:38:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZYhcK-0007y0-F3; Sun, 06 Sep 2015 21:36:52 +0000 Received: from smtp08.smtpout.orange.fr ([80.12.242.130] helo=smtp.smtpout.orange.fr) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZYhcG-0007wy-El for linux-arm-kernel@lists.infradead.org; Sun, 06 Sep 2015 21:36:50 +0000 Received: from belgarion ([109.222.247.56]) by mwinf5d43 with ME id DxcH1r00A1DkrDp03xcJsy; Sun, 06 Sep 2015 23:36:25 +0200 X-ME-Helo: belgarion X-ME-Auth: amFyem1pay5yb2JlcnRAb3JhbmdlLmZy X-ME-Date: Sun, 06 Sep 2015 23:36:25 +0200 X-ME-IP: 109.222.247.56 From: Robert Jarzmik To: Russell King - ARM Linux Subject: Re: [PATCH] ARM: fix alignement of __bug_table section entries References: <1441175009-26730-1-git-send-email-robert.jarzmik@free.fr> <20150902103955.GF6281@e103592.cambridge.arm.com> <878u8lx9hl.fsf@belgarion.home> <20150905142519.GN21084@n2100.arm.linux.org.uk> <87y4gkx04m.fsf@belgarion.home> <20150905203818.GO21084@n2100.arm.linux.org.uk> <87lhcjwjde.fsf@belgarion.home> <20150906194805.GP21084@n2100.arm.linux.org.uk> X-URL: http://belgarath.falguerolles.org/ Date: Sun, 06 Sep 2015 23:31:34 +0200 In-Reply-To: <20150906194805.GP21084@n2100.arm.linux.org.uk> (Russell King's message of "Sun, 6 Sep 2015 20:48:06 +0100") Message-ID: <87egibw7yh.fsf@belgarion.home> User-Agent: Gnus/5.130008 (Ma Gnus v0.8) Emacs/24.4 (gnu/linux) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150906_143649_073367_D0D9226C X-CRM114-Status: GOOD ( 15.41 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Russell King - ARM Linux writes: >> [1] Approach 1 : translation table sync >> ======================================= ... > The important place is in arch/arm/include/asm/domain.h, which is where > we manipulate the DACR within probe_kernel_address(). Gah, silly me. But even with [1], I still get an error [2]. I have a confirmation that I have a "Page Permission" fault on the probe_kernel_address(). Next thing I'll check is if I can read the TLB cache for the code entry. It's a very instructive bug for me :) Cheers. ======================================================= diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 7bbf325a4f31..73d5ad456e32 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -449,6 +449,13 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) #endif .endm + .macro dacr_sync, rd + mrc p15, 0, \rd, c2, c0, 0 + mov \rd, \rd + sub pc, pc, #4 + mcr p15, 0, \rd, c7, c5, 4 + .endm + .macro uaccess_disable, tmp, isb=1 #ifdef CONFIG_CPU_SW_DOMAIN_PAN /* @@ -457,6 +464,7 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) */ mov \tmp, #DACR_UACCESS_DISABLE mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register + dacr_sync \tmp .if \isb instr_sync .endif @@ -471,6 +479,7 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) */ mov \tmp, #DACR_UACCESS_ENABLE mcr p15, 0, \tmp, c3, c0, 0 + dacr_sync \tmp .if \isb instr_sync .endif @@ -488,6 +497,7 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) #ifdef CONFIG_CPU_SW_DOMAIN_PAN ldr r0, [sp, #S_FRAME_SIZE] mcr p15, 0, r0, c3, c0, 0 + dacr_sync r0 #endif .endm diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h index e878129f2fee..10c9a38636ac 100644 --- a/arch/arm/include/asm/domain.h +++ b/arch/arm/include/asm/domain.h @@ -97,7 +97,11 @@ static inline unsigned int get_domain(void) static inline void set_domain(unsigned val) { asm volatile( - "mcr p15, 0, %0, c3, c0 @ set domain" + "mcr p15, 0, %0, c3, c0; @ set domain \ + mrc p15, 0, %0, c2, c0, 0; \ + mov %0, %0; \ + sub pc, pc, #4; \ + mcr p15, 0, %0, c7, c5, 4" : : "r" (val)); isb(); } diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 9769f1eefe3b..c9c454129344 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -747,6 +747,27 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, return NULL; } +static u32 far_read(void) +{ + u32 far; + asm("mrc p15, 0, %0, c6, c0, 0" : "=r" (far)); + return far; +} + +static u32 fsr_read(void) +{ + u32 fsr; + asm("mrc p15, 0, %0, c5, c0, 0" : "=r" (fsr)); + return fsr; +} + +static u32 dacr_read(void) +{ + u32 dacr; + asm("mrc p15, 0, %0, c3, c0, 0" : "=r" (dacr)); + return dacr; +} + static int do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) { @@ -763,6 +784,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) local_irq_enable(); instrptr = instruction_pointer(regs); + pr_info("RJK1: fsr=%x far=%x dacr=%x\n", fsr_read(), far_read(), dacr_read()); + pr_info("RJK2: fsr=%x far=%x dacr=%x\n", fsr_read(), far_read(), dacr_read()); if (thumb_mode(regs)) { u16 *ptr = (u16 *)(instrptr & ~1); @@ -787,6 +810,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) instr = __mem_to_opcode_arm(instr); } + pr_info("RJK3: fsr=%x far=%x dacr=%x\n", fsr_read(), far_read(), dacr_read()); + pr_info("RJK: fault=%d instr=0x%08x instrptr=%p\n", fault, instr, instrptr); if (fault) { type = TYPE_FAULT; goto bad_or_fault;