From patchwork Tue Oct 23 17:03:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hilman X-Patchwork-Id: 1631621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 617043FD85 for ; Tue, 23 Oct 2012 17:04:28 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQhsQ-0006yR-PF; Tue, 23 Oct 2012 17:02:50 +0000 Received: from mail-da0-f49.google.com ([209.85.210.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQhsM-0006xR-JW for linux-arm-kernel@lists.infradead.org; Tue, 23 Oct 2012 17:02:47 +0000 Received: by mail-da0-f49.google.com with SMTP id q27so1877160daj.36 for ; Tue, 23 Oct 2012 10:02:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:organization:references:date:in-reply-to :message-id:user-agent:mime-version:content-type:x-gm-message-state; bh=aCJMXmEBlKU2sAUV+enRQV976utI56id2PRIglibqo8=; b=prCpGxF64qdwmyY0C9cU4+1XuS8joy8ZiYnvwX4/acmcMnBs9eCTp0Kz+AGxMKWfW6 YPTmgb+7wJNb/Sn8FeNftzbEwvteaAUyajGG3Wxp5hXtNnDy6Z1s54fsJmnI6kyIGW65 w0SW5CxeZflOUuGXNeV4xdzrRV8j2tAmdV8Ngm6v6JoUKmNEptMgCidBAQSWJVlQlPLj GyNxDwzI32DB60eS1Hz5zUU7mtvKJu9YZz51ofyuoc1pqDA9Jvi0zTrX9pLKaParavvH HFzxFd3cRyw9lX3pKT+1VKa1sAxvU54vz413MA5QP5WHcnvT6GNwVyqg1uXhmGFooiaf 7O/A== Received: by 10.68.220.42 with SMTP id pt10mr42310059pbc.84.1351011764493; Tue, 23 Oct 2012 10:02:44 -0700 (PDT) Received: from localhost (c-24-19-7-36.hsd1.wa.comcast.net. [24.19.7.36]) by mx.google.com with ESMTPS id iu8sm7959153pbc.71.2012.10.23.10.02.42 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 23 Oct 2012 10:02:43 -0700 (PDT) From: Kevin Hilman To: Paul Walmsley Subject: Re: [RFC] ARM: OMAP: hwmod: wait for sysreset complete after enabling hwmod Organization: Deep Root Systems, LLC References: <1350922532-26338-1-git-send-email-t-kristo@ti.com> <87txtlb6v7.fsf@deeprootsystems.com> Date: Tue, 23 Oct 2012 10:03:11 -0700 In-Reply-To: <87txtlb6v7.fsf@deeprootsystems.com> (Kevin Hilman's message of "Tue, 23 Oct 2012 07:28:12 -0700") Message-ID: <87objt9l4g.fsf@deeprootsystems.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/23.3 (gnu/linux) MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlz8OzJ/oN/yT0hFhyJXVbEKuIx9vR/w9h01gV+7RA+RMyltrWawcOuOQA7cvKhv/EO5EsM X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Tero Kristo , linux-omap@vger.kernel.org, Benoit Cousson , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Kevin Hilman writes: > Paul Walmsley writes: > >> Hi Tero, >> >> On Mon, 22 Oct 2012, Tero Kristo wrote: >> >>> When waking up from off-mode, some IP blocks are reset automatically by >>> hardware. For this reason, software must wait until the reset has >>> completed before attempting to access the IP block. >>> >>> This patch fixes for example the bug introduced by commit >>> 6c31b2150ff96755d24e0ab6d6fea08a7bf5c44c ("mmc: omap_hsmmc: remove access >>> to SYSCONFIG register"), in which the MMC IP block is reset during >>> off-mode entry, but the code expects the module to be already available >>> during the execution of context restore. >>> >>> Signed-off-by: Tero Kristo >>> Cc: Paul Walmsley >>> Cc: Benoit Cousson >>> Cc: Venkatraman S >> >> What do you think about these modifications? The code is quite similar to >> what was in the _ocp_softreset() function, so just moved it into a >> function. Also moved the callsite from the end of _enable_sysc() to the >> beginning, which makes more sense to me, but would like to get your >> opinion. > > FYI, after some more testing with this patch, I noticed that this patch > (and the original from Tero) cause some sluggishness on UART1 console my > 37xx/EVM platform as soon as off-mode is enabled (even without the UART > autosuspend timeouts enabled.) I don't see this on any other OMAP3 > platform but all the others I have have UART3 console (in PER), the EVM > is the only one with UART1 console (in CORE.) OK, found it. The reason for the sluggishness is that the GPIO blocks are timing out in the omap_test_timout() calls added in this patch, suggesting that they never detect reset done. Looking at the other user of _wait_softreset_complete made me remember that there modules that need their optional clocks enabled in order for softreset to work. It appears that the optional clocks are needed not only to initiate a softrest, but also to check SYSS.RESETDONE. The patch below on top of Paul's version makes the sluggishness disappear. Kevin diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index f9d8b2a..70267d2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1320,7 +1320,11 @@ static void _enable_sysc(struct omap_hwmod *oh) * (off-mode for example), and the drivers require the * IP to be ready when they access it */ + if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) + _enable_optional_clocks(oh); _wait_softreset_complete(oh); + if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) + _disable_optional_clocks(oh); v = oh->_sysc_cache; sf = oh->class->sysc->sysc_flags;