From patchwork Fri Jul 7 12:04:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pratyush Anand X-Patchwork-Id: 9829995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 71358602CA for ; Fri, 7 Jul 2017 12:06:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5DEB72858E for ; Fri, 7 Jul 2017 12:06:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 50CF728639; Fri, 7 Jul 2017 12:06:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.4 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_SORBS_SPAM autolearn=no version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AFDA62858E for ; Fri, 7 Jul 2017 12:06:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=jS6WPM6k59M0cLg5KXyXSn0EXySSWNDpr2AcrmC0qvg=; b=Pellvv5nSdKUwNIHn2uifzZvb8 JWDGDON0qoMMfDNme1hyQA1PyJS2PGOouLhrWQPSrh7+WPvDoNUfbxQiw6opiLkNpqv42SqDtIMrm xfP9EoYAWApfeCzVwJG/CVNgNviXRv9GXHiGUUocDLbLAJp3FfbzLXzwARUxOreiGu5SbCfKNYY1h xUTUX6W38XcFVYINL9WTdNp9q2xoqmWxKuQ5ldSZ18IRAVP+zf0bDRSQbn1+gNz86YeoB1N1PMdKD qCy3eOYGW6objS+jxp49w4C9sHB7hWaRE4NNkwR0kp8jdgrKwNJrJuiA/REucuAvULQf6CIg2gk8F hTsRpzhg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dTS1S-0004bp-HE; Fri, 07 Jul 2017 12:06:10 +0000 Received: from mail-pg0-f49.google.com ([74.125.83.49]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dTS0q-0003XK-8z for linux-arm-kernel@lists.infradead.org; Fri, 07 Jul 2017 12:05:36 +0000 Received: by mail-pg0-f49.google.com with SMTP id u62so16300633pgb.3 for ; Fri, 07 Jul 2017 05:05:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=f4kXpI2oemIFlPHD65oTdYPvdkjC6zlB5pUM723uLuI=; b=jQn6+zgLN1oFB+j/W+2fDJLPRNzBOQMTpU8XrgTuhD11DXnJ24iLvDvm7iJUmG43+Z xPILhlZTDL2UeLILiNAsy2mXDqho34sUQTzhWykTUmVz1MCoucPBJOGw6KHgqxf4XUVw pIVgZi8Y/we6jFCElKdtN04TF7248RUWcFAHEm/Au0cO2na3eLH3KlSsF3XCwBtdhQfQ njTVy8ccIB6KrFBvRezd1Jp/aOFsRjlqsqpiFzW8rljXZWHKVa/ZHeu/JbV3uFVqzlLi 0RcuqLay8chevxqsbROEX+Y6IqaIRnKLol0EGks4TrQUSzw1c+g+lR0sH02EcOVC5KSD uusQ== X-Gm-Message-State: AIVw113CLm4yGEiFd/caeE0LrLSTBadwyIpFGeyJRe2L5Gs2iBNqGROj Jie4fJpOuapxAzTcnosrgQ== X-Received: by 10.98.73.65 with SMTP id w62mr31139800pfa.61.1499429111216; Fri, 07 Jul 2017 05:05:11 -0700 (PDT) Received: from localhost ([182.64.124.31]) by smtp.gmail.com with ESMTPSA id o73sm6849811pfi.2.2017.07.07.05.05.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Jul 2017 05:05:10 -0700 (PDT) From: Pratyush Anand To: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, Will Deacon Subject: [PATCH V2 4/4] arm64: disable irq between breakpoint and step exception Date: Fri, 7 Jul 2017 17:34:00 +0530 Message-Id: <8f9c3073792c107e3d928e413499572ec75c5175.1499416107.git.panand@redhat.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170707_050532_730203_7967A288 X-CRM114-Status: GOOD ( 17.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pratyush Anand , linux-kernel@vger.kernel.org, huawei.libin@huawei.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP If an interrupt is generated between breakpoint and step handler then step handler can not get correct step address. This situation can easily be invoked by samples/hw_breakpoint/data_breakpoint.c. It can also be reproduced if we insert any printk() statement or dump_stack() in perf overflow_handler. So, it seems that perf is working fine just luckily. If the CPU which is handling perf breakpoint handler receives any interrupt then, perf step handler will not execute sanely. This patch improves do_debug_exception() handling, which enforces now, that exception handler function: - should return 0 for any software breakpoint and hw breakpoint/watchpoint handler if it does not expect a single step stage - should return 1 if it expects single step. - A single step handler should always return 0. - All handler should return a -ve error in any other case. Now, we can know in do_debug_exception() that whether a step exception will be followed or not. If there will a step exception then disable irq. Re-enable it after single step handling. Signed-off-by: Pratyush Anand --- arch/arm64/kernel/debug-monitors.c | 3 +++ arch/arm64/kernel/hw_breakpoint.c | 4 ++-- arch/arm64/mm/fault.c | 22 ++++++++++++++++++---- 3 files changed, 23 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c index d618e25c3de1..16f29f853b54 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -325,6 +325,9 @@ static int brk_handler(unsigned long addr, unsigned int esr, return -EFAULT; } + if (kernel_active_single_step() || test_thread_flag(TIF_SINGLESTEP)) + return 1; + return 0; } NOKPROBE_SYMBOL(brk_handler); diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index 9a73f85ab9ad..d39b8039c70e 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -697,7 +697,7 @@ static int breakpoint_handler(unsigned long unused, unsigned int esr, } } - return 0; + return 1; } NOKPROBE_SYMBOL(breakpoint_handler); @@ -840,7 +840,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, } } - return 0; + return 1; } NOKPROBE_SYMBOL(watchpoint_handler); diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 37b95dff0b07..ce5290dacba3 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -653,6 +653,13 @@ static struct fault_info __refdata debug_fault_info[] = { { do_bad, SIGBUS, 0, "unknown 7" }, }; +/* + * fn should return 0 from any software breakpoint and hw + * breakpoint/watchpoint handler if it does not expect a single step stage + * and 1 if it expects single step followed by its execution. A single step + * handler should always return 0. All handler should return a -ve error in + * any other case. + */ void __init hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *), int sig, int code, const char *name) @@ -665,6 +672,8 @@ void __init hook_debug_fault_code(int nr, debug_fault_info[nr].name = name; } +static DEFINE_PER_CPU(bool, irq_enable_needed); + asmlinkage int __exception do_debug_exception(unsigned long addr, unsigned int esr, struct pt_regs *regs) @@ -672,6 +681,7 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, const struct fault_info *inf = debug_fault_info + DBG_ESR_EVT(esr); struct siginfo info; int rv; + bool *irq_en_needed = this_cpu_ptr(&irq_enable_needed); /* * Tell lockdep we disabled irqs in entry.S. Do nothing if they were @@ -680,9 +690,8 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, if (interrupts_enabled(regs)) trace_hardirqs_off(); - if (!inf->fn(addr, esr, regs)) { - rv = 1; - } else { + rv = inf->fn(addr, esr, regs); + if (rv < 0) { pr_alert("Unhandled debug exception: %s (0x%08x) at 0x%016lx\n", inf->name, esr, addr); @@ -691,7 +700,12 @@ asmlinkage int __exception do_debug_exception(unsigned long addr, info.si_code = inf->code; info.si_addr = (void __user *)addr; arm64_notify_die("", regs, &info, 0); - rv = 0; + } else if (rv == 1 && interrupts_enabled(regs)) { + regs->pstate |= PSR_I_BIT; + *irq_en_needed = true; + } else if (rv == 0 && *irq_en_needed) { + regs->pstate &= ~PSR_I_BIT; + *irq_en_needed = false; } if (interrupts_enabled(regs))