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X-Spam-Score: 0.3 (/) Cc: Mark Rutland , devicetree@vger.kernel.org, Russell King , Pawel Moll , Stephen Warren , Ian Campbell , Rob Herring , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch defines common Armada XP pinctrl settings for uart2 and uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP): uart2: MPP42-43 as default uart3: MPP44-45 as default Suggested-by: Andrew Lunn Signed-off-by: Arnaud Ebalard --- arch/arm/boot/dts/armada-xp.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 83bf32344a60..c7449f652fb5 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -48,6 +48,16 @@ "mpp33", "mpp34", "mpp35"; marvell,function = "sd0"; }; + + uart2_pins: uart2-pins { + marvell,pins = "mpp42", "mpp43"; + marvell,function = "uart2"; + }; + + uart3_pins: uart3-pins { + marvell,pins = "mpp44", "mpp45"; + marvell,function = "uart3"; + }; }; i2c0: i2c@11000 { @@ -62,6 +72,8 @@ uart2: serial@12200 { compatible = "snps,dw-apb-uart"; + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; reg = <0x12200 0x100>; reg-shift = <2>; interrupts = <43>; @@ -72,6 +84,8 @@ uart3: serial@12300 { compatible = "snps,dw-apb-uart"; + pinctrl-0 = <&uart3_pins>; + pinctrl-names = "default"; reg = <0x12300 0x100>; reg-shift = <2>; interrupts = <44>;