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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id y4-20020aa7d504000000b00456d2721d93sm5411275edq.64.2022.09.29.07.04.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Sep 2022 07:04:02 -0700 (PDT) Message-ID: <94bcb278-7bb9-d173-497c-fe12682c4a17@gmail.com> Date: Thu, 29 Sep 2022 16:04:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 From: Johan Jonker Subject: [RFC PATCH v1 1/2] dt-bindings: pwm: rockchip: add interrupts property To: heiko@sntech.de Cc: thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com, wxt@rock-chips.com, kever.yang@rock-chips.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220929_070407_353630_EAAF4B3D X-CRM114-Status: GOOD ( 10.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Rockchip SoCs have 4 or more built-in PWM channels. Configurable to operate in capture mode. Measures the high/low polarity effective cycles of this input waveform Generates a single interrupt at the transition of input waveform polarity Configurable to operate in continuous mode or one-shot mode. One-shot operation will produce N + 1 periods of the waveform, where N is the repeat counter value, and generates a single interrupt at the end of operation. Continuous mode generates the waveform continuously and do not generates any interrupts. Older SoCs have an interrupt for each node. Newer models share an interrupt. Add interrupts property to the pwm-rockchip.yaml file. DT describes hardware. Rockchip PWM driver support for interrupts might not available. Signed-off-by: Johan Jonker Acked-by: Rob Herring --- Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml index f2d1dc7e7..f7634069d 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml @@ -37,6 +37,9 @@ properties: reg: maxItems: 1 + interrupts: + maxItems: 1 + clocks: minItems: 1 maxItems: 2