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Fri, 19 Mar 2021 11:28:05 -0700 (PDT) From: Cristian Ciocaltea To: Rob Herring , =?utf-8?q?Andreas_F=C3=A4rber?= , Manivannan Sadhasivam Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: soc: actions: Add Actions Semi Owl socinfo binding Date: Fri, 19 Mar 2021 20:27:59 +0200 Message-Id: <95105518f61408743d17783099ed9c373a3dfe18.1616178258.git.cristian.ciocaltea@gmail.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210319_182806_765501_CD7163B5 X-CRM114-Status: GOOD ( 13.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add devicetree binding for the Actions Semi Owl SoCs info module. Signed-off-by: Cristian Ciocaltea --- .../bindings/soc/actions/owl-socinfo.yaml | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml diff --git a/Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml b/Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml new file mode 100644 index 000000000000..3fcb1f584fdf --- /dev/null +++ b/Documentation/devicetree/bindings/soc/actions/owl-socinfo.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/actions/owl-socinfo.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoC info module + +maintainers: + - Cristian Ciocaltea + +description: | + Actions Semi Owl SoC info module provides access to various information + about the S500, S700 and S900 SoC variants, such as serial number or id. + +patternProperties: + "^soc(@[0-9a-f]+)?$": + type: object + properties: + compatible: + items: + - enum: + - actions,s500-soc + - actions,s700-soc + - actions,s900-soc + - const: simple-bus + + "#address-cells": + enum: [1, 2] + + "#size-cells": + enum: [1, 2] + + ranges: true + + actions,serial-number-addrs: + description: | + Contains the physical addresses in DDR memory where the two parts + of the serial number (low & high) can be read from. + This is currently supported only on the S500 SoC variant. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + + required: + - compatible + + additionalProperties: + type: object + +additionalProperties: true + +examples: + - | + / { + compatible = "roseapplepi,roseapplepi", "actions,s500"; + model = "Roseapple Pi"; + #address-cells = <1>; + #size-cells = <1>; + + soc { + compatible = "actions,s500-soc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + actions,serial-number-addrs = <0x800>, /* S/N Low */ + <0x804>; /* S/N High */ + }; + }; + +...