@@ -50,6 +50,42 @@ &hscif0 {
status = "okay";
};
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ eeprom@50 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "cpu-board";
+ reg = <0x50>;
+ pagesize = <8>;
+ };
+
+ eeprom@51 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "breakout-board";
+ reg = <0x51>;
+ pagesize = <8>;
+ };
+
+ eeprom@52 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "csi-dsi-sub-board-id";
+ reg = <0x52>;
+ pagesize = <8>;
+ };
+
+ eeprom@53 {
+ compatible = "rohm,br24g01", "atmel,24c01";
+ label = "ethernet-sub-board-id";
+ reg = <0x53>;
+ pagesize = <8>;
+ };
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
@@ -59,6 +95,11 @@ hscif0_pins: hscif0 {
function = "hscif0";
};
+ i2c0_pins: i2c0 {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
Enable the I2C0 bus on the Gray Hawk Single board, and describe the I2C EEPROMs present. Based on patches for Gray Hawk in the BSP by Hai Pham. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- The Gray Hawk Single documentation does not mention the purpose of the I2C EEPROMs, but the schematics label the last two as "Board ID". The labels match the corresponding EEPROMs on the White Hawk CPU and BreakOut board stack, from which the Gray Hawk Single board is derived. --- .../dts/renesas/r8a779h0-gray-hawk-single.dts | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+)