Message ID | 96d6567024cef9fcd6b04f92a697301c1c8d1d8e.1708354463.git.geert+renesas@glider.be (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/2] arm64: dts: renesas: r8a779h0: Add RPC node | expand |
On Mon, Feb 19, 2024 at 04:00:41PM +0100, Geert Uytterhoeven wrote: > From: Cong Dang <cong.dang.xn@renesas.com> > > Describe the QSPI FLASH on the Gray Hawk Single board. > > Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff --git a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts index 1163ac5e292755db..bc8616a56c039b20 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts +++ b/arch/arm64/boot/dts/renesas/r8a779h0-gray-hawk-single.dts @@ -181,12 +181,45 @@ mmc_pins: mmc { power-source = <1800>; }; + qspi0_pins: qspi0 { + groups = "qspi0_ctrl", "qspi0_data4"; + function = "qspi0"; + }; + scif_clk_pins: scif-clk { groups = "scif_clk"; function = "scif_clk"; }; }; +&rpc { + pinctrl-0 = <&qspi0_pins>; + pinctrl-names = "default"; + + status = "okay"; + + flash@0 { + compatible = "spansion,s25fs512s", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-rx-bus-width = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot@0 { + reg = <0x0 0x1200000>; + read-only; + }; + user@1200000 { + reg = <0x1200000 0x2e00000>; + }; + }; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay";