From patchwork Mon Jun 12 15:34:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 9781617 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6D52E60352 for ; Mon, 12 Jun 2017 15:35:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A6DA28522 for ; Mon, 12 Jun 2017 15:35:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E16A2853D; Mon, 12 Jun 2017 15:35:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C112F28522 for ; Mon, 12 Jun 2017 15:35:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=XRrcMo4c7YPVqp10rRPTwvKHNHiaF184f/M+PkO8P04=; b=MO1x5H8GTtlOAluNcrHEF4X0lp tgWwJxrFkVcmytktbXOClAmQY9rpZiHaHSg9XsWYN6LqKSL2+Qcn7B8zghRrMojayCfP48Dy3ej74 mp9iXpHr4nlk4nkzuq8Jhlr4MfLR6SMz9K3+PVnT6t1a1juMA75XK21FKaE3MZO4oCR/hW+KzJx1n +aTlmTqyZHjyfKF5R+iE4kL8pazBZIuy2NNuZdzdlcF0WOXGauyqDiALzUpacPHlT5PNDnlSuktQw 6S8Zu5G7MvwpxKxYTxoI5GIE9Ucv79dV1U0Fs1WrPsTLciy5PCxAxSdidObvj22mjot0LxN1nBxkE CqV8z0NA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dKRNa-0007nR-0W; Mon, 12 Jun 2017 15:35:46 +0000 Received: from mail.free-electrons.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dKRNM-0007Y6-OI for linux-arm-kernel@lists.infradead.org; Mon, 12 Jun 2017 15:35:35 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id DE8D72196B; Mon, 12 Jun 2017 17:35:07 +0200 (CEST) Received: from localhost (unknown [93.29.146.83]) by mail.free-electrons.com (Postfix) with ESMTPSA id B1CAF212E6; Mon, 12 Jun 2017 17:35:07 +0200 (CEST) From: Gregory CLEMENT To: Linus Walleij , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/9] gpio: mvebu: fix regmap_update_bits usage Date: Mon, 12 Jun 2017 17:34:52 +0200 Message-Id: <9a098130daa8daeef89fd6c1e80d982699d5c175.1497281623.git-series.gregory.clement@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170612_083532_962622_14A6DF7E X-CRM114-Status: GOOD ( 11.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Petazzoni , Andrew Lunn , Ralph Sennhauser , Jason Cooper , devicetree@vger.kernel.org, Omri Itach , Nadav Haklai , Kostya Porotchkin , Russell King , Rob Herring , Neta Zur Hershkovits , Chris Packham , Gregory CLEMENT , Shadi Ammouri , Marcin Wojtas , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In some place in the driver regmap_update_bits was misused. Indeed the last argument is not the value of the bit (or group of bits) itself but the mask value inside the register. So when setting the bit N, then the value must be BIT(N) and not 1. CC: Chris Packham CC: Ralph Sennhauser Reviewed-by: Thomas Petazzoni Tested-by: Ralph Sennhauser Tested-by: Chris Packham Signed-off-by: Gregory CLEMENT --- drivers/gpio/gpio-mvebu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 4aec8762fdc5..d5939913d310 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -341,7 +341,7 @@ static int mvebu_gpio_direction_input(struct gpio_chip *chip, unsigned int pin) return ret; regmap_update_bits(mvchip->regs, GPIO_IO_CONF_OFF, - BIT(pin), 1); + BIT(pin), BIT(pin)); return 0; } @@ -503,7 +503,7 @@ static int mvebu_gpio_irq_set_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_FALLING: case IRQ_TYPE_LEVEL_LOW: regmap_update_bits(mvchip->regs, GPIO_IN_POL_OFF, - BIT(pin), 1); + BIT(pin), BIT(pin)); break; case IRQ_TYPE_EDGE_BOTH: { u32 data_in, in_pol, val;