From patchwork Tue Nov 30 17:37:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 12694196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43630C433F5 for ; Tue, 30 Nov 2021 17:46:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3bJNp3H2KPCklxRRQAcWfSk2YdmBYsaeOEa7FJPZiPo=; b=YWDY087OD2GyLD qlcmRzwlYVQrxvcP2GAF/XZhRXiXMiohrTvU3IjDU5NZQgVR/TSgskvbq4bbelljpupAB3h4CCWS3 xAyvYYg3xFHYmCWJorJWLT0p6BwlqG1JIUtW7jgbcaqiKVxIG4kZ20Nk1bZX8kVZA8QqoQdBZH7Mj 7iHHXkIharJ4U1p28b2fatPDVg2SWCD5bDNSQqlurjhF1kfQYizaqSPKEq+1VosYunENPtwX/Dvkl xGMFB1S5Xs5i+J6XzcsupwNi3lYk8nVN/fub4QowdQ8xtycmUgupwQYWYgrKnVQ0QiU0zg8jgMP+6 xDBhRZryuKpP5bKeiksA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ms7BL-006N6h-K6; Tue, 30 Nov 2021 17:44:43 +0000 Received: from bzq-84-110-109-230.red.bezeqint.net ([84.110.109.230] helo=mx.tkos.co.il) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ms7BH-006N5J-QR for linux-arm-kernel@lists.infradead.org; Tue, 30 Nov 2021 17:44:41 +0000 Received: from tarshish.tkos.co.il (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id 31C45440EF5; Tue, 30 Nov 2021 19:38:05 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1638293885; bh=pmHAI62PJcgonrZzzSospKoaD7olCeJWuUO2kcIBOCs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pBpcX/wseBX5giUf5oR4HHIvYTF3LOCRQQtpJqwTlDnkRtkcwg9/5KfrA15MOQX9y To7LwzQKYl1YZhYa1KB46NwAPEuwEX3UzAWhWtitaPUD1IdBAeF8lC70GVdjwo33X2 ETqoklBGJsasNcswo0Y2BzKKPpZq7MTDsmd+JbCQ0FuBEnNWZxu+LBLm3YpNTNn+WQ YxRmTx8AmdpsE1lBsdBPg6hmzA1pVvYnLVnGIvOFGL1eyTUHqbTNhGzmlM5nRXqzOf xiWRJH8s2hhf/fxjlbozMYPL+jivjCyGVJ9tM2eMGEaHX/gMuMHxPf/AKFmdveSs6V IfUsySyWzyHDw== From: Baruch Siach To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Andy Gross , Bjorn Andersson Cc: Baruch Siach , Balaji Prakash J , Rob Herring , Robert Marko , Kathiravan T , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v9 3/3] arm64: dts: ipq6018: add pwm node Date: Tue, 30 Nov 2021 19:37:30 +0200 Message-Id: <9e233bf613d05f32c36ca19d60854e017cb35e47.1638293850.git.baruch@tkos.co.il> X-Mailer: git-send-email 2.33.0 In-Reply-To: <8137a76d66146dd5c1efa0c46c60de5766b7a349.1638293850.git.baruch@tkos.co.il> References: <8137a76d66146dd5c1efa0c46c60de5766b7a349.1638293850.git.baruch@tkos.co.il> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211130_094440_085924_60FD2240 X-CRM114-Status: GOOD ( 12.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Describe the PWM block on IPQ6018. The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add &pwm as child of &tcsr. Add also ipq6018 specific compatible string. Signed-off-by: Baruch Siach --- v9: Add 'ranges' property (Rob) v8: Add size cell to 'reg' (Rob) v7: Use 'reg' instead of 'offset' (Rob) Add qcom,tcsr-ipq6018 (Rob) Drop clock-names (Bjorn) v6: Make the PWM node child of TCSR (Rob Herring) Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König) v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) --- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 933b56103a46..6a22bb5f42f4 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -258,8 +258,21 @@ tcsr_mutex_regs: syscon@1905000 { }; tcsr: syscon@1937000 { - compatible = "syscon"; + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; reg = <0x0 0x01937000 0x0 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x01937000 0x21000>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; }; blsp_dma: dma-controller@7884000 {