From patchwork Thu Jul 5 05:20:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Ramesh" X-Patchwork-Id: 1158001 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 17043DFB7C for ; Thu, 5 Jul 2012 05:26:04 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SmeUn-0006dM-IG; Thu, 05 Jul 2012 05:20:53 +0000 Received: from na3sys009aog136.obsmtp.com ([74.125.149.85]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1SmeUX-0006d5-T6 for linux-arm-kernel@lists.infradead.org; Thu, 05 Jul 2012 05:20:41 +0000 Received: from mail-bk0-f42.google.com ([209.85.214.42]) (using TLSv1) by na3sys009aob136.postini.com ([74.125.148.12]) with SMTP ID DSNKT/UkGtWtlNdhUEKkYOQ2Wm/xC4CezP/i@postini.com; Wed, 04 Jul 2012 22:20:37 PDT Received: by bkcjm19 with SMTP id jm19so1491197bkc.15 for ; Wed, 04 Jul 2012 22:20:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:date:message-id:subject:from:to:cc:content-type :x-gm-message-state; bh=gtrlq+1rIJCs7rQIN7zSnWyv3YZaPwsOJSTS66vO+fk=; b=LyfD0vH5KIUzoGteONYhL5y/azRK6fyYVaGwVGE8+XqFx7HlkUO3yBfYPwjeHWkM5J lZz2pOz3j3OAz7tSMp2yFhMwAi3nlYdHaJJk97BgiuX7VmRkYAq8chhUzIpG9lyJ7L72 1slNcHMQ87hJfVsainvBs0c7jiDq/UC5snV+XLVVoZDLfKWQFQivT5xKXwi5EYWmIiwp ZD7fkgpGuCX4IamorpndeQ2r0C50AQxcLbHlxPLwrSkE3Z8lCZHOxQ1i2OdnvBR3V5tt bFWFz63ga9ZeCVvJnGd1RXXF6NlhVnth2NN2vvFUZjrggmruVp/vMVgUCkRI4xFZgRD3 UrRw== MIME-Version: 1.0 Received: by 10.204.154.141 with SMTP id o13mr8806744bkw.72.1341465624644; Wed, 04 Jul 2012 22:20:24 -0700 (PDT) Received: by 10.205.83.71 with HTTP; Wed, 4 Jul 2012 22:20:24 -0700 (PDT) Date: Thu, 5 Jul 2012 10:50:24 +0530 Message-ID: Subject: [PATCH v4 2/2] OMAP:IOMMU:flush L1 and L2 caches From: "Gupta, Ramesh" To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org X-Gm-Message-State: ALoCoQnhYEMLryCN31V4z6GsPh0zEZehYTo76Q1PBLnYaQdOT0kIgj+MEQ+aH7OToVEmgFtcOl6Y X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.85 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: tony@atomide.com, Russell King - ARM Linux X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From 393c4effbbec74ff9b969d53ce4d36fde56b71df Mon Sep 17 00:00:00 2001 From: Ramesh Gupta G Date: Fri, 15 Jun 2012 16:46:46 +0530 Subject: [PATCH v4 2/2] OMAP:IOMMU:flush L1 and L2 caches OMAP IOMMU need to make sure that data in the L1 and L2 caches is visible to the MMU hardware whenever the pagetables are updated. The current code only takes care of L1 cache using assembly code. Added code to handle this using a new L1 cache maintenance function and the outer cache function. Signed-off-by: Ramesh Gupta G --- drivers/iommu/omap-iommu.c | 26 +++++++++----------------- 1 files changed, 9 insertions(+), 17 deletions(-) } else { @@ -542,7 +534,7 @@ static int iopgd_alloc_section(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) } *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION; - flush_iopgd_range(iopgd, iopgd); + flush_iopgd_range(iopgd, iopgd + 1); return 0; } @@ -559,7 +551,7 @@ static int iopgd_alloc_super(struct omap_iommu *obj, u32 da, u32 pa, u32 prot) for (i = 0; i < 16; i++) *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER; - flush_iopgd_range(iopgd, iopgd + 15); + flush_iopgd_range(iopgd, iopgd + 16); return 0; } @@ -700,7 +692,7 @@ static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da) } bytes *= nent; memset(iopte, 0, nent * sizeof(*iopte)); - flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte)); + flush_iopte_range(iopte, iopte + nent * sizeof(*iopte)); /* * do table walk to check if this table is necessary or not @@ -722,7 +714,7 @@ static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da) bytes *= nent; } memset(iopgd, 0, nent * sizeof(*iopgd)); - flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd)); + flush_iopgd_range(iopgd, iopgd + nent * sizeof(*iopgd)); out: return bytes; } diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index 6899dcd..f909019 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -469,22 +469,14 @@ EXPORT_SYMBOL_GPL(omap_foreach_iommu_device); */ static void flush_iopgd_range(u32 *first, u32 *last) { - /* FIXME: L2 cache should be taken care of if it exists */ - do { - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd" - : : "r" (first)); - first += L1_CACHE_BYTES / sizeof(*first); - } while (first <= last); + flush_iommu_mem(first, last); + outer_flush_range(virt_to_phys(first), virt_to_phys(last)); } static void flush_iopte_range(u32 *first, u32 *last) { - /* FIXME: L2 cache should be taken care of if it exists */ - do { - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte" - : : "r" (first)); - first += L1_CACHE_BYTES / sizeof(*first); - } while (first <= last); + flush_iommu_mem(first, last); + outer_flush_range(virt_to_phys(first), virt_to_phys(last)); } static void iopte_free(u32 *iopte) @@ -513,7 +505,7 @@ static u32 *iopte_alloc(struct omap_iommu *obj, u32 *iopgd, u32 da) return ERR_PTR(-ENOMEM); *iopgd = virt_to_phys(iopte) | IOPGD_TABLE; - flush_iopgd_range(iopgd, iopgd); + flush_iopgd_range(iopgd, iopgd + 1); dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);