From patchwork Fri Mar 29 09:16:03 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lin Mac X-Patchwork-Id: 2364791 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 6052C3FD8C for ; Fri, 29 Mar 2013 09:19:19 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ULVPv-00053a-Ps; Fri, 29 Mar 2013 09:16:14 +0000 Received: from mail-ve0-f176.google.com ([209.85.128.176]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ULVPo-00051V-EA for linux-arm-kernel@lists.infradead.org; Fri, 29 Mar 2013 09:16:05 +0000 Received: by mail-ve0-f176.google.com with SMTP id ox1so355649veb.7 for ; Fri, 29 Mar 2013 02:16:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:x-received:date:message-id:subject:from:to:cc :content-type; bh=98SO5niif/Z3izMNDufA8RqD6j8kG7JNzaRhGgt2FIQ=; b=XMgcXwHqnG00ymfPqObV7OdGZRZSewtdQ0ZjPoQURMMuEMmCrQJTu9TSxrFXkVK6jF NJziYYSVCWCyqDYUVdrSouCH884rjc/m4VRWVSAI/IcauTfuNFbEbs52yO8ljshv/vZy r7U3gyS69hxSrrJbaerv4TEcEy+74cQCvUbGAPSpf4UF6TSihtV8/2FXnCUDFIoI8Um8 pIAU+8Gzpz8zO05+qJfoL+377nfXBtPZR85rtJB4DZaXCJSx7YYTH5UrPUxLEnvFH/0q rdEazx2RmgmADwE/eBZPaBYctDnTuq2ccuN8Egn8RNdbZsujiRJomBZq7wuHw6k/igDH Wxug== MIME-Version: 1.0 X-Received: by 10.52.17.174 with SMTP id p14mr980605vdd.125.1364548563105; Fri, 29 Mar 2013 02:16:03 -0700 (PDT) Received: by 10.58.135.227 with HTTP; Fri, 29 Mar 2013 02:16:03 -0700 (PDT) Date: Fri, 29 Mar 2013 17:16:03 +0800 Message-ID: Subject: [PATCH 1/2] ARM: cns3xxx: remove unused virtual address and iotable defines From: Mac Lin To: Anton Vorontsov X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130329_051604_715793_2E59F73E X-CRM114-Status: GOOD ( 10.04 ) X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (mkl0301[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.128.176 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (mkl0301[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Mac Lin , Richard Liu , Imre Kaloz , Florian Fainelli , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From eb7223502ded6a8c6dda4da32b2f3ba636b08bf1 Mon Sep 17 00:00:00 2001 From: Mac Lin Date: Mon, 25 Mar 2013 17:24:19 +0800 Subject: [PATCH 1/2] ARM: cns3xxx: remove unused virtual address and iotable defines Remove unused virtual address and iotable defines. Signed-off-by: Mac Lin --- arch/arm/mach-cns3xxx/cns3xxx.h | 27 --------------------------- arch/arm/mach-cns3xxx/core.c | 10 ---------- 2 files changed, 0 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-cns3xxx/cns3xxx.h b/arch/arm/mach-cns3xxx/cns3xxx.h index d7d3a8d..77b8093 100644 --- a/arch/arm/mach-cns3xxx/cns3xxx.h +++ b/arch/arm/mach-cns3xxx/cns3xxx.h @@ -20,22 +20,16 @@ #define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */ #define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */ -#define CNS3XXX_SWITCH_BASE_VIRT 0xFFF00000 #define CNS3XXX_PPE_BASE 0x70001000 /* HANT */ -#define CNS3XXX_PPE_BASE_VIRT 0xFFF50000 #define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */ -#define CNS3XXX_EMBEDDED_SRAM_BASE_VIRT 0xFFF60000 #define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */ -#define CNS3XXX_SSP_BASE_VIRT 0xFFF01000 #define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */ -#define CNS3XXX_DMC_BASE_VIRT 0xFFF02000 #define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */ -#define CNS3XXX_SMC_BASE_VIRT 0xFFF03000 #define SMC_MEMC_STATUS_OFFSET 0x000 #define SMC_MEMIF_CFG_OFFSET 0x004 @@ -74,13 +68,10 @@ #define SMC_PCELL_ID_3_OFFSET 0xFFC #define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */ -#define CNS3XXX_GPIOA_BASE_VIRT 0xFFF04000 #define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */ -#define CNS3XXX_GPIOB_BASE_VIRT 0xFFF05000 #define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */ -#define CNS3XXX_RTC_BASE_VIRT 0xFFF06000 #define RTC_SEC_OFFSET 0x00 #define RTC_MIN_OFFSET 0x04 @@ -112,22 +103,16 @@ #define CNS3XXX_UART0_BASE_VIRT 0xFFF09000 #define CNS3XXX_UART1_BASE 0x78400000 /* UART 1 */ -#define CNS3XXX_UART1_BASE_VIRT 0xFFF0A000 #define CNS3XXX_UART2_BASE 0x78800000 /* UART 2 */ -#define CNS3XXX_UART2_BASE_VIRT 0xFFF0B000 #define CNS3XXX_DMAC_BASE 0x79000000 /* Generic DMA Control */ -#define CNS3XXX_DMAC_BASE_VIRT 0xFFF0D000 #define CNS3XXX_CORESIGHT_BASE 0x7A000000 /* CoreSight */ -#define CNS3XXX_CORESIGHT_BASE_VIRT 0xFFF0E000 #define CNS3XXX_CRYPTO_BASE 0x7B000000 /* Crypto */ -#define CNS3XXX_CRYPTO_BASE_VIRT 0xFFF0F000 #define CNS3XXX_I2S_BASE 0x7C000000 /* I2S */ -#define CNS3XXX_I2S_BASE_VIRT 0xFFF10000 #define CNS3XXX_TIMER1_2_3_BASE 0x7C800000 /* Timer */ #define CNS3XXX_TIMER1_2_3_BASE_VIRT 0xFFF10800 @@ -150,42 +135,31 @@ #define TIMER_FREERUN_CONTROL_OFFSET 0x44 #define CNS3XXX_HCIE_BASE 0x7D000000 /* HCIE Control */ -#define CNS3XXX_HCIE_BASE_VIRT 0xFFF30000 #define CNS3XXX_RAID_BASE 0x7E000000 /* RAID Control */ -#define CNS3XXX_RAID_BASE_VIRT 0xFFF12000 #define CNS3XXX_AXI_IXC_BASE 0x7F000000 /* AXI IXC */ -#define CNS3XXX_AXI_IXC_BASE_VIRT 0xFFF13000 #define CNS3XXX_CLCD_BASE 0x80000000 /* LCD Control */ -#define CNS3XXX_CLCD_BASE_VIRT 0xFFF14000 #define CNS3XXX_USBOTG_BASE 0x81000000 /* USB OTG Control */ -#define CNS3XXX_USBOTG_BASE_VIRT 0xFFF15000 #define CNS3XXX_USB_BASE 0x82000000 /* USB Host Control */ #define CNS3XXX_SATA2_BASE 0x83000000 /* SATA */ #define CNS3XXX_SATA2_SIZE SZ_16M -#define CNS3XXX_SATA2_BASE_VIRT 0xFFF17000 #define CNS3XXX_CAMERA_BASE 0x84000000 /* Camera Interface */ -#define CNS3XXX_CAMERA_BASE_VIRT 0xFFF18000 #define CNS3XXX_SDIO_BASE 0x85000000 /* SDIO */ -#define CNS3XXX_SDIO_BASE_VIRT 0xFFF19000 #define CNS3XXX_I2S_TDM_BASE 0x86000000 /* I2S TDM */ -#define CNS3XXX_I2S_TDM_BASE_VIRT 0xFFF1A000 #define CNS3XXX_2DG_BASE 0x87000000 /* 2D Graphic Control */ -#define CNS3XXX_2DG_BASE_VIRT 0xFFF1B000 #define CNS3XXX_USB_OHCI_BASE 0x88000000 /* USB OHCI */ #define CNS3XXX_L2C_BASE 0x92000000 /* L2 Cache Control */ -#define CNS3XXX_L2C_BASE_VIRT 0xFFF27000 #define CNS3XXX_PCIE0_MEM_BASE 0xA0000000 /* PCIe Port 0 IO/Memory Space */ #define CNS3XXX_PCIE0_MEM_BASE_VIRT 0xE0000000 @@ -239,7 +213,6 @@ #define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT 0xFF001000 #define CNS3XXX_TC11MP_L220_BASE 0x92002000 /* L220 registers */ -#define CNS3XXX_TC11MP_L220_BASE_VIRT 0xFF002000 /* * Misc block diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index 49e657c..4499558 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c @@ -48,16 +48,6 @@ static struct map_desc cns3xxx_io_desc[] __initdata = { .length = SZ_4K, .type = MT_DEVICE, }, { - .virtual = CNS3XXX_GPIOA_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_GPIOA_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = CNS3XXX_GPIOB_BASE_VIRT, - .pfn = __phys_to_pfn(CNS3XXX_GPIOB_BASE), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = CNS3XXX_MISC_BASE_VIRT, .pfn = __phys_to_pfn(CNS3XXX_MISC_BASE), .length = SZ_4K,