From patchwork Thu Aug 29 08:41:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2851169 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 50A69BF546 for ; Thu, 29 Aug 2013 08:42:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 19D27202CA for ; Thu, 29 Aug 2013 08:42:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A2764201FB for ; Thu, 29 Aug 2013 08:42:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VExo7-0005AY-4P; Thu, 29 Aug 2013 08:42:23 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VExo4-0004RW-SU; Thu, 29 Aug 2013 08:42:20 +0000 Received: from mail-ie0-x22e.google.com ([2607:f8b0:4001:c03::22e]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VExo2-0004RC-25 for linux-arm-kernel@lists.infradead.org; Thu, 29 Aug 2013 08:42:18 +0000 Received: by mail-ie0-f174.google.com with SMTP id k14so194380iea.5 for ; Thu, 29 Aug 2013 01:41:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=O8ipyB8Q/QYyJ3CktRTQ+1K1NRv4e/zgfufTjIP4VIo=; b=uN6WpabPNdsXuq0a1EMM4BxZEf6XC95ZqHuS0lPg7hcF/6hC4hXUxizsntRplmaZ2e RZLYpC+S+xQswvx9sVj3S2dB+ZlWVzp71fujjYKM33CZzO5jk8PUmx9sQE+yjZHRhKH9 UXiV//6Wj8ytxmFAFcTU3VXQ5ZwGYlqKnePyxN+TPTDU8O3zMjJqvdZVQuQ8IddmwfdV dJszsbbuitD9QK7lbvA5Mv8Ys2iWKZAJHGdBz+TxXseWVC9KKraUwCKXl3yQmlHj1chE RV37DA69L8lnhYexFYMu45uE376HUmkQdfN1n82XtPBftt5vx81nGPtV2INkoRYFac4V e29Q== MIME-Version: 1.0 X-Received: by 10.43.104.73 with SMTP id dl9mr1084890icc.39.1377765716002; Thu, 29 Aug 2013 01:41:56 -0700 (PDT) Received: by 10.50.85.19 with HTTP; Thu, 29 Aug 2013 01:41:55 -0700 (PDT) In-Reply-To: <51F9777B.2080500@codeaurora.org> References: <1375251940-7809-1-git-send-email-horms+renesas@verge.net.au> <51F94A35.2020907@codeaurora.org> <51F9777B.2080500@codeaurora.org> Date: Thu, 29 Aug 2013 17:41:55 +0900 Message-ID: Subject: Re: [PATCH] clocksource: em_sti: Adjust clock event rating to fix SMP broadcast From: Magnus Damm To: Stephen Boyd X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130829_044218_186384_2CBA5C45 X-CRM114-Status: GOOD ( 20.79 ) X-Spam-Score: -2.0 (--) Cc: SH-Linux , Daniel Lezcano , Magnus Damm , John Stultz , Simon Horman , Thomas Gleixner , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Aug 1, 2013 at 5:45 AM, Stephen Boyd wrote: > On 07/31/13 12:17, Magnus Damm wrote: >> Hi Stephen, >> >> On Thu, Aug 1, 2013 at 2:32 AM, Stephen Boyd wrote: >>> On 07/30/13 23:25, Simon Horman wrote: >>>> From: Magnus Damm >>>> >>>> Update the STI rating from 200 to 80 to fix SMP operation with >>>> the ARM broadcast timer. This breakage was introduced by: >>>> >>>> f7db706 ARM: 7674/1: smp: Avoid dummy clockevent being preferred over real hardware clock-event >>>> >>>> Without this fix SMP operation is broken on EMEV2 since no >>>> broadcast timer interrupts trigger on the secondary CPU cores. >>>> >>>> Signed-off-by: Magnus Damm >>>> Signed-off-by: Simon Horman >>>> --- >>> This looks suspicious. Are you're purposefully deflating the rating so >>> that the STI timer fills in the broadcast position? Why not make the STI >>> cpumask be all possible CPUs? Presumably the interrupt can target all >>> CPUs since it isn't a per-cpu interrupt and doing this would cause the >>> STI to fill in the broadcast slot, leaving the per-cpu dummys in the >>> tick position. >> While letting the timer broadcast to all CPUs sounds interesting the >> STI driver has so far only been used to drive a single CPU core. This >> used to work well for us but has since some time unfortunately been >> broken. I agree that it may be suboptimal with a single timer like STI >> and using IPI for broadcast, but for more efficient SMP we already >> have TWD or arch timer. > > I think there is some confusion. The mask field says what CPUs the timer > can possibly interrupt and for non-percpu interrupts this should be all > possible CPUs (unless we're talking clusters, etc. but I don't think we > are). Can you please give the output of /proc/timer_list or confirm that > the STI is your broadcast source? If so you should probably be marking > the cpumask for all possible CPUs so that the clockevent core knows to > prefer this clockevent for the broadcast source and not a per-cpu > source. Then you can leave the rating as is. Hello Stephen, Thanks for your suggestion. Yes, there was indeed some confusion. Now after diving into the code a bit deeper I can finally understand what you mean. Instead of adjusting the rating I've changed the cpumask member like this: Without the cpumask fix or without the earlier rating fix the following interrupt count can be seen in /proc/interrupts on KZM9D: 157: 140 0 GIC 157 e0180000.sti 160: 0 0 e0050000.gpio 1 eth0 IPI0: 0 0 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts Above, notice how no IPI1 interrupts seem to be arriving. With the cpumask fix above the interrupt count becomes like this: 157: 559 0 GIC 157 e0180000.sti 160: 0 0 e0050000.gpio 1 eth0 IPI0: 0 0 CPU wakeup interrupts IPI1: 0 601 Timer broadcast interrupts Would this be in line with your expectation? Thanks, / magnus --- 0001/drivers/clocksource/em_sti.c +++ work/drivers/clocksource/em_sti.c 2013-08-29 17:33:16.000000000 +0900 @@ -301,7 +301,7 @@ static void em_sti_register_clockevent(s ced->name = dev_name(&p->pdev->dev); ced->features = CLOCK_EVT_FEAT_ONESHOT; ced->rating = 200; - ced->cpumask = cpumask_of(0); + ced->cpumask = cpu_all_mask; ced->set_next_event = em_sti_clock_event_next; ced->set_mode = em_sti_clock_event_mode;