From patchwork Mon Oct 22 04:46:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Yongjun X-Patchwork-Id: 1623341 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id C64F2400E8 for ; Mon, 22 Oct 2012 04:48:14 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TQ9uE-0001R3-4S; Mon, 22 Oct 2012 04:46:26 +0000 Received: from mail-qc0-f177.google.com ([209.85.216.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TQ9u8-0001Qp-RL for linux-arm-kernel@lists.infradead.org; Mon, 22 Oct 2012 04:46:23 +0000 Received: by mail-qc0-f177.google.com with SMTP id u28so1233637qcs.36 for ; Sun, 21 Oct 2012 21:46:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:cc:content-type; bh=fKQVjZZyMr/EHRmdAzUb6NzsbCupaFp98vVFCGzgrVk=; b=yum2rBupBQvWaLzmjn0mSy9y3jUmLbiXyO/sQLwAOP0urnS3WYJ2H0ey3/ePlrH60f 1r2dbU7fxelfvMUc1cRgi3PL9PeZaIFe6SRkr/IU15JVKeZF59CeiK8C4shyD2hZbeH2 TDnshnfAt5Dy+TdOE6M4tuzmiCFm8PQ6LW+Q5K2IcD4BhZOlpoFlVfvJWsoNzjyoQ5Qk azfmvUVAHpPgU2TUNtKL51aBQG9GqgBVRm5KLY7KBrfeOw7zZCGdVh0N4mi3pR13fLCM XzEaVx1SHZ/DMFKL3yIsSy4qNRE4Kh7gcb0iUcTDK2BpqUAJ+dJWZYIDAlvq1AfnCn7+ tXXw== MIME-Version: 1.0 Received: by 10.49.4.65 with SMTP id i1mr4306395qei.51.1350881179249; Sun, 21 Oct 2012 21:46:19 -0700 (PDT) Received: by 10.229.134.205 with HTTP; Sun, 21 Oct 2012 21:46:19 -0700 (PDT) Date: Mon, 22 Oct 2012 12:46:19 +0800 Message-ID: Subject: [PATCH] ARM: PCI: fix missing unlock on error From: Wei Yongjun To: linux@arm.linux.org.uk X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (weiyj.lk[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.177 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: yongjun_wei@trendmicro.com.cn, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Wei Yongjun Add the missing unlock on the error handle path in function nanoengine_read_config() and nanoengine_write_config(). Signed-off-by: Wei Yongjun --- arch/arm/mach-sa1100/pci-nanoengine.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c index ff02e2d..6ff07d7 100644 --- a/arch/arm/mach-sa1100/pci-nanoengine.c +++ b/arch/arm/mach-sa1100/pci-nanoengine.c @@ -67,8 +67,10 @@ static int nanoengine_read_config(struct pci_bus *bus, unsigned int devfn, int w spin_lock_irqsave(&nano_lock, flags); ret = nanoengine_get_pci_address(bus, devfn, where, &address); - if (ret != PCIBIOS_SUCCESSFUL) + if (ret != PCIBIOS_SUCCESSFUL) { + spin_unlock_irqrestore(&nano_lock, flags); return ret; + } v = __raw_readl(address); spin_unlock_irqrestore(&nano_lock, flags); @@ -95,8 +97,10 @@ static int nanoengine_write_config(struct pci_bus *bus, unsigned int devfn, int spin_lock_irqsave(&nano_lock, flags); ret = nanoengine_get_pci_address(bus, devfn, where, &address); - if (ret != PCIBIOS_SUCCESSFUL) + if (ret != PCIBIOS_SUCCESSFUL) { + spin_unlock_irqrestore(&nano_lock, flags); return ret; + } v = __raw_readl(address); switch (size) { case 1: