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Wed, 20 Apr 2016 22:34:27 +0000 From: Han Xu To: Yunhui Cui , "computersforpeace@gmail.com" , "han.xu@freescale.com" Subject: Re: [PATCH 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash Thread-Topic: [PATCH 6/9] mtd: spi-nor: Support R/W for S25FS-S family flash Thread-Index: AQHRlgI01jJdxtMBXEePGSXWClockp+TfFnE Date: Wed, 20 Apr 2016 22:34:27 +0000 Message-ID: References: <1460605855-6689-1-git-send-email-B56489@freescale.com>, <1460605855-6689-7-git-send-email-B56489@freescale.com> In-Reply-To: <1460605855-6689-7-git-send-email-B56489@freescale.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: vger.kernel.org; dkim=none (message not signed) header.d=none; vger.kernel.org; dmarc=none action=none header.from=nxp.com; x-originating-ip: [132.245.53.5] x-ms-office365-filtering-correlation-id: 2a7ade2d-57c6-4c4b-ddc2-08d3696bee6e x-microsoft-exchange-diagnostics: 1; DB5PR0401MB1909; 5:fxykQsKLjZD8CqpirD62W7SCYyWWhiEIbQkctdzR0u5KNLoK3GhKIJrXTuHYkMICCyMt4Zld4lTMsCk+p+MHu1rqIHq7ZKJIMxOkfeM4Cr8uhCAQlHw/96LxXs10EJxm0wHk3cW9ltKmKftK0Wqtu0j02cu2VhEOSfbOepULI01PTbBfcn/x09yUO0LXW6VF; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB5PR0401MB1909; H:DB5PR0401MB1845.eurprd04.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Apr 2016 22:34:27.0157 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR0401MB1909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160420_153450_517722_D6704649 X-CRM114-Status: GOOD ( 13.79 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yunhui Cui , "linux-kernel@vger.kernel.org" , "linux-mtd@lists.infradead.org" , Yao Yuan , "dwmw2@infradead.org" , "linux-arm-kernel@lists.infradead.org" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 157841d..91ee920 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -39,6 +39,10 @@ #define SPI_NOR_MAX_ID_LEN 6 #define SPI_NOR_MAX_ADDR_WIDTH 4 +/* Added for S25FS-S family flash */ +#define SPINOR_CONFIG_REG3_OFFSET 0x800004 +#define CR3V_4KB_ERASE_UNABLE 0x8 +#define SPINOR_S25FS_FAMILY_ID 0x81 struct flash_info { char *name; @@ -78,6 +82,7 @@ struct flash_info { }; #define JEDEC_MFR(info) ((info)->id[0]) +#define EXT_ID(info) ((info)->id[5]) static const struct flash_info *spi_nor_match_id(const char *name); @@ -881,6 +886,7 @@ static const struct flash_info spi_nor_ids[] = { */ { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, 0)}, { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -1018,6 +1024,53 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) return ERR_PTR(-ENODEV); } +/* + * The S25FS-S family physical sectors may be configured as a + * hybrid combination of eight 4-kB parameter sectors + * at the top or bottom of the address space with all + * but one of the remaining sectors being uniform size. + * The Parameter Sector Erase commands (20h or 21h) must + * be used to erase the 4-kB parameter sectors individually. + * The Sector (uniform sector) Erase commands (D8h or DCh) + * must be used to erase any of the remaining + * sectors, including the portion of highest or lowest address + * sector that is not overlaid by the parameter sectors. + * The uniform sector erase command has no effect on parameter sectors. + */ +static int spansion_s25fs_disable_4kb_erase(struct spi_nor *nor) +{ + struct fsl_qspi *q; + u32 cr3v_addr = SPINOR_CONFIG_REG3_OFFSET; + u8 cr3v = 0x0; + int ret = 0x0; + + q = nor->priv; + + nor->cmd_buf[2] = cr3v_addr >> 16; + nor->cmd_buf[1] = cr3v_addr >> 8; + nor->cmd_buf[0] = cr3v_addr >> 0; I feel it's hacking code. Hi Brian, do we have any plan to support this special case? The RDAR( Read Any Register) needs an extra address parameter. + + ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1); + if (ret) + return ret; + if (cr3v & CR3V_4KB_ERASE_UNABLE) + return 0; + ret = nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0); + if (ret) + return ret; + cr3v = CR3V_4KB_ERASE_UNABLE; + nor->program_opcode = SPINOR_OP_SPANSION_WRAR; + nor->write(nor, cr3v_addr, 1, NULL, &cr3v); + + ret = nor->read_reg(nor, SPINOR_OP_SPANSION_RDAR, &cr3v, 1); + if (ret) + return ret; + if (!(cr3v & CR3V_4KB_ERASE_UNABLE)) + return -EPERM; +