From patchwork Wed Aug 17 07:51:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 1073092 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.4) with ESMTP id p7H7qTPq018943 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 17 Aug 2011 07:52:50 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qtav8-00033S-Pq; Wed, 17 Aug 2011 07:52:16 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Qtav8-0007kU-7n; Wed, 17 Aug 2011 07:52:14 +0000 Received: from [2002:4e20:1eda::1] (helo=caramon.arm.linux.org.uk) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Qtav5-0007kB-AP for linux-arm-kernel@lists.infradead.org; Wed, 17 Aug 2011 07:52:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Date:Sender:Message-Id:Content-Type:MIME-Version:Cc:Subject:Cc:To:From:References:In-Reply-To; bh=YFp38Mfa8hSezVD7KGMwr2U3vWWVARG45/kmUnkjAaw=; b=l5MHjbWkOw6wf+y3Y1LjijOqACxW4BN8UDYe9glhQd9ugH6WQm6N/aFaRSwHgGwlN51mUeK6X9xUos3eJPyu02l9XNJFjU53VIrFnLUWVRzr7GSz6FPN1uQBi1A1VNTBGLBQ51OR3pUaomj0PqLpqKL8hiqCaU4l7lF9bcHOa40=; Received: from e0022681537dd.dyn.arm.linux.org.uk ([2002:4e20:1eda:1:222:68ff:fe15:37dd] helo=rmk-PC.arm.linux.org.uk) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1Qtaup-0001sW-BK; Wed, 17 Aug 2011 08:51:55 +0100 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1Qtauq-0007Ml-BH; Wed, 17 Aug 2011 08:51:56 +0100 In-Reply-To: <20110817075104.GC1006@n2100.arm.linux.org.uk> References: <20110817075104.GC1006@n2100.arm.linux.org.uk> From: Russell King - ARM Linux To: Imre Kaloz , Krzysztof Halasa , Ben Dooks Subject: [PATCH 02/10] ARM: io: RiscPC: define io addresses relative to IO_BASE MIME-Version: 1.0 Content-Disposition: inline Message-Id: Date: Wed, 17 Aug 2011 08:51:56 +0100 X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110817_035211_987500_5210C738 X-CRM114-Status: GOOD ( 10.99 ) X-Spam-Score: 1.2 (+) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 1.3 RDNS_NONE Delivered to internal network by a host with no rDNS Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 17 Aug 2011 07:52:50 +0000 (UTC) Signed-off-by: Russell King --- arch/arm/mach-rpc/include/mach/hardware.h | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h index dde6b3c..822b810 100644 --- a/arch/arm/mach-rpc/include/mach/hardware.h +++ b/arch/arm/mach-rpc/include/mach/hardware.h @@ -51,12 +51,12 @@ /* * IO Addresses */ -#define VIDC_BASE IOMEM(0xe0400000) -#define EXPMASK_BASE 0xe0360000 -#define IOMD_BASE IOMEM(0xe0200000) -#define IOC_BASE IOMEM(0xe0200000) -#define PCIO_BASE IOMEM(0xe0010000) -#define FLOPPYDMA_BASE IOMEM(0xe002a000) +#define VIDC_BASE (IO_BASE + 0x00400000) +#define EXPMASK_BASE (IO_BASE + 0x00360000) +#define IOMD_BASE (IO_BASE + 0x00200000) +#define IOC_BASE (IO_BASE + 0x00200000) +#define FLOPPYDMA_BASE (IO_BASE + 0x0002a000) +#define PCIO_BASE (IO_BASE + 0x00010000) #define vidc_writel(val) __raw_writel(val, VIDC_BASE)