@@ -79,6 +79,7 @@ asmlinkage void secondary_start_kernel(void);
struct secondary_data {
struct task_struct *task;
long status;
+ phys_addr_t ttbr1;
};
extern struct secondary_data secondary_data;
@@ -121,6 +121,7 @@ int main(void)
DEFINE(IRQ_CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
BLANK();
DEFINE(CPU_BOOT_TASK, offsetof(struct secondary_data, task));
+ DEFINE(CPU_BOOT_TTBR1, offsetof(struct secondary_data, ttbr1));
BLANK();
DEFINE(FTR_OVR_VAL_OFFSET, offsetof(struct arm64_ftr_override, val));
DEFINE(FTR_OVR_MASK_OFFSET, offsetof(struct arm64_ftr_override, mask));
@@ -646,7 +646,8 @@ SYM_FUNC_START_LOCAL(secondary_startup)
ldr_l x0, vabits_actual
#endif
bl __cpu_setup // initialise processor
- adrp x1, swapper_pg_dir
+ adr_l x1, secondary_data
+ ldr x1, [x1, #CPU_BOOT_TTBR1]
adrp x2, idmap_pg_dir
bl __enable_mmu
ldr x8, =__secondary_switched
@@ -119,6 +119,9 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
* page tables.
*/
secondary_data.task = idle;
+ secondary_data.ttbr1 = __swapper_pg_dir_node_phys(cpu_to_node(cpu));
+ dcache_clean_poc((uintptr_t)&secondary_data,
+ (uintptr_t)&secondary_data + sizeof(secondary_data));
update_cpu_boot_status(CPU_MMU_OFF);
/* Now bring the CPU into our world */
Arrange for secondary CPUs to boot with TTBR1 pointing at the appropriate per-node copy of the kernel page tables for the CPUs NUMA node. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> --- arch/arm64/include/asm/smp.h | 1 + arch/arm64/kernel/asm-offsets.c | 1 + arch/arm64/kernel/head.S | 3 ++- arch/arm64/kernel/smp.c | 3 +++ 4 files changed, 7 insertions(+), 1 deletion(-)