From patchwork Wed Apr 3 09:19:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2385801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 6C5163FC71 for ; Wed, 3 Apr 2013 09:22:12 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UNJqz-0005hc-5X; Wed, 03 Apr 2013 09:19:37 +0000 Received: from moutng.kundenserver.de ([212.227.17.10]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UNJqa-0005aQ-2d for linux-arm-kernel@lists.infradead.org; Wed, 03 Apr 2013 09:19:13 +0000 Received: from axis700.grange (dslb-094-221-105-117.pools.arcor-ip.net [94.221.105.117]) by mrelayeu.kundenserver.de (node=mrbap0) with ESMTP (Nemesis) id 0M2Wmb-1UfXBZ0zWH-00sOts; Wed, 03 Apr 2013 11:19:08 +0200 Received: by axis700.grange (Postfix, from userid 1000) id DF47C40BB4; Wed, 3 Apr 2013 11:19:07 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id DD23840BB3; Wed, 3 Apr 2013 11:19:07 +0200 (CEST) Date: Wed, 3 Apr 2013 11:19:07 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: Simon Horman Subject: [PATCH/RFC 2/2] ARM: shmobile: marzen-reference: add irqpin support in DT In-Reply-To: Message-ID: References: MIME-Version: 1.0 X-Provags-ID: V02:K0:2eVib7exVEvoGQSpt6xdDzQJ4494lO/MUfoV+oF+3AC dp2GZodiEkvRIfhtZfBr58EcJ52shD4hKBHU4rGJl9EI5qTFFv aRqRlWc8+OrPzi21DWoh79FKzIlaD7oD8ilStUq1yooiwHFnRI KSTuJZiHdtQucweIVMkmlaLMQb8+PPcinV8w+nO+56UZaLItUd I50BFyI10scc26GjQblZfPNmeZ0ir3+n8QrD5oBXW/YEddsfkD nvGFIaSOGX9O4+XpcmGoik8x2p89EGZXCztWU+9VWEzUj7O+Ky PScHkKksoN7TPE4EX6hO1QmbWwtE6iZDi3Dd0T/KkL1PcgD4eu sFovM8fCqohzmCvGk+N4K0xjKW64adLefx0vdqmjynXLZupZPJ 2sFwjHuF4D2SA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130403_051912_345172_282DFC72 X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.17.10 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (g.liakhovetski[at]gmx.de) -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -2.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree-discuss@lists.ozlabs.org, Magnus Damm , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, linux-sh@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add an irqpin interrupt controller DT node on marzen-reference. Signed-off-by: Guennadi Liakhovetski --- arch/arm/boot/dts/r8a7779.dtsi | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index fe5c6f2..7f146c6 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -48,6 +48,23 @@ <0xf0000100 0x100>; }; + irqpin0: irqpin@fe780010 { + compatible = "renesas,intc-irqpin"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xfe78001c 4>, + <0xfe780010 4>, + <0xfe780024 4>, + <0xfe780044 4>, + <0xfe780064 4>; + interrupt-parent = <&gic>; + interrupts = <0 27 0x4 + 0 28 0x4 + 0 29 0x4 + 0 30 0x4>; + sense-bitfield-width = <2>; + }; + i2c0: i2c@0xffc70000 { #address-cells = <1>; #size-cells = <0>;