From patchwork Thu Jun 13 09:23:38 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2715441 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A401F9F3DD for ; Thu, 13 Jun 2013 10:30:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 79F03201C4 for ; Thu, 13 Jun 2013 10:30:10 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EDF3A201B1 for ; Thu, 13 Jun 2013 10:30:08 +0000 (UTC) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Un3lX-0000mK-B5; Thu, 13 Jun 2013 09:24:23 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Un3lK-000731-BB; Thu, 13 Jun 2013 09:24:10 +0000 Received: from moutng.kundenserver.de ([212.227.126.171]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Un3lF-00072Z-T3 for linux-arm-kernel@lists.infradead.org; Thu, 13 Jun 2013 09:24:06 +0000 Received: from axis700.grange (dslb-088-077-162-009.pools.arcor-ip.net [88.77.162.9]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0Llck0-1UDiw70L8y-00ZMVq; Thu, 13 Jun 2013 11:23:39 +0200 Received: by axis700.grange (Postfix, from userid 1000) id BEEA940BB5; Thu, 13 Jun 2013 11:23:38 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id BC78440BB4; Thu, 13 Jun 2013 11:23:38 +0200 (CEST) Date: Thu, 13 Jun 2013 11:23:38 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org Subject: [PATCH v4] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Message-ID: MIME-Version: 1.0 X-Provags-ID: V02:K0:xVRMlhABntiWOxazeXLzKIKEYGCUXQuJ30EvPCyYR6b Zq9h0AmRtl/u3e/K14OHVSsVXWzuHkSx5QVBQEMgJ1LpOrJaRm I0XGNDxMBhbIxCi2krjiQGScHwqgs0PGO/0MfF4JYkdCP1FtdT uLyVKIesxOEbdyuyQ82SntZOevoGKh4hUHXkSqXl2lfkNksCb8 v4PlOynxYK2tlmz0KveDGG6Jfna+nQKbsFa4Pg/R/nDtF4Uj2O i9LDuudiv05NOyQQqClKt8p5rpscQig2sbqcLkTbnNYm0RNIaO Awzvf2F95qEtAkaZzPv9VBlLBYQK7ltO9QNqLrASSSbOsiyfM3 sXyBivZ1YIhdraRqpwhVXkAku5X/oyzxtwRSaxjM5ZSPWKw2l9 O3h5acB3Gycrg== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130613_052406_235332_06F359F4 X-CRM114-Status: GOOD ( 13.16 ) X-Spam-Score: -2.1 (--) Cc: Olof Johansson , Simon Horman , Magnus Damm , linux-arm-kernel@lists.infradead.org, Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values. Signed-off-by: Guennadi Liakhovetski Acked-by: Arnd Bergmann --- v4: as suggested by Arnd, add a description for #interrupt-cells .../interrupt-controller/renesas,intc-irqpin.txt | 14 ++++++++++++++ drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++ 2 files changed, 18 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt new file mode 100644 index 0000000..66fcaf5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt @@ -0,0 +1,14 @@ +DT bindings for the R-/SH-Mobile irqpin controller + +Required properties: + +- compatible: has to be "renesas,intc-irqpin" +- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in + interrupts.txt in this directory + +Optional properties: + +- any properties, listed in interrupts.txt, and any standard resource allocation + properties +- sense-bitfield-width: width of a single sense bitfield in the SENSE register, + if different from the default 4 bits diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c index 5a68e5a..4aca1b2 100644 --- a/drivers/irqchip/irq-renesas-intc-irqpin.c +++ b/drivers/irqchip/irq-renesas-intc-irqpin.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev) /* deal with driver instance configuration */ if (pdata) memcpy(&p->config, pdata, sizeof(*pdata)); + else + of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width", + &p->config.sense_bitfield_width); if (!p->config.sense_bitfield_width) p->config.sense_bitfield_width = 4; /* default to 4 bits */