From patchwork Fri Jan 19 12:55:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 10175233 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BDB3D60392 for ; Fri, 19 Jan 2018 12:57:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACBD728685 for ; Fri, 19 Jan 2018 12:57:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A165F28696; Fri, 19 Jan 2018 12:57:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 061BD28685 for ; Fri, 19 Jan 2018 12:57:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=g5TYLHHGcI3miHw5L2mIsvZlJZ/q+dmjuX5LdN54bHU=; b=g4H1ErqdWdwIemBCbygJJrLOgV HV9/b0CFY/bFNwzgQYRyzl6pdNEVtfXB1PWXunBd15VxZYR+5M5VQSRAcFyQtV0305cOR8+IabeOl TUYO9mlpnxyVIGKfUXYRALBTPN3ZGw+ymVCLtBGoMnhZnptiiJwPLR5xE0tH6JHffFSq/z5Bqjera 1sauh//8/4NZlKpwNfagR/Dylno+lxcKoV+fFBHSRSCEUu8W80WxypCNLyFSA4CAGJO1K+u9EthCi qEedhlmxMfVNyWQdECygeKmwpG6NPm2e1G0YX2AK0YTMRe/KrwYVFoY0kvpJJnWt5kBjNdkMn/Tu8 r54Kb5qg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.89 #1 (Red Hat Linux)) id 1ecWEn-0007MA-Rf; Fri, 19 Jan 2018 12:57:41 +0000 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]) by bombadil.infradead.org with esmtps (Exim 4.89 #1 (Red Hat Linux)) id 1ecWDH-0005e3-Vz for linux-arm-kernel@lists.infradead.org; Fri, 19 Jan 2018 12:56:15 +0000 Received: by mail-wr0-x241.google.com with SMTP id g21so1481191wrb.13 for ; Fri, 19 Jan 2018 04:56:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=v41maV7EGizOx8pI79MATBmF3eFiZ2iaastBo/w8LY8=; b=fg4rM8b/J4YmKB8vsmVwZY92cI5pNg47sc6KJn9Zd6/BkNlBK3BsQUzw60LzQhy0Sn t/xoUOVhU5Mu1OJKat0iRhrbwaHghufSfgDcqXqq8b7zy4UR4m0r/gDmKEcqsAA1hGaR MVsQG12cV07q/c3kuo6kNf3tCMGwD4HgKqo8SY6Pf+5tEG4D+tH2oM3TTjfXyEf6Nb/d l4sM1vYGKicLs8AGYW++I3ShV/2M4COEFgpLESmKDnq+EmxsXjo0HuRq+RQLTZjq1bcx bJw9ufpAQiXmAnIIjclhNfMrMLkVQhnDIFlwlABYVU+1AYGQeDZ/G2e0M7d/jUP6J5ZE QSrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references; bh=v41maV7EGizOx8pI79MATBmF3eFiZ2iaastBo/w8LY8=; b=pDqaeA1PBHnkkb6N/6MONUfFBMIRWd5LJt0LPJPUdemCFB690yZFKzbjPTPJ1HB2ux U/5uAgmrP+inxzky22dmqbRHm8OvDI5p9MqvImqOozSZv2AyQhFffbJktjf/MVVTMK0l vCJ5ABvItERclbjhFSOO7iwbmsuWEJMttYob1BAjvf0hZMH+JsSSSiUAiegcz9VLOBhU te1xVakZE1oZV6tfpNUCY9z85YrAQwqJy4kCe4JDdxLavC8Xx/tCXrMblMspq22VguDn cTDFqGCOqBBd67nfhAAlwes5TkQYa6LPVrqxM7shN11t+msT6QJJP3tj4DFt/uJUISF8 tgww== X-Gm-Message-State: AKwxytf4fn3+TBbNej0xfy94ZWGh6DP0pQlWkeC6CDK99qkuBsY2yW1z iYqzQ5s0CywbWSqMTTfhpGjFNg== X-Google-Smtp-Source: ACJfBosu4L1QteMEFEOW1py9/e/e1KNDvcNSynqeImR5sDz+JiYur90DCd741HASS3enyqXHM1MBlw== X-Received: by 10.223.139.147 with SMTP id o19mr9031159wra.66.1516366560447; Fri, 19 Jan 2018 04:56:00 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id y64sm340184wmg.35.2018.01.19.04.55.59 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 19 Jan 2018 04:55:59 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Subject: [PATCH 5/7] arm64: zynqmp: Add support for Xilinx zcu111-revA Date: Fri, 19 Jan 2018 13:55:44 +0100 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , monstr@monstr.eu, Arnd Bergmann , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Masahiro Yamada , Rob Herring , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Xilinx zcu111 is a customer board. It is reusing some parts from zcu102. Signed-off-by: Michal Simek --- arch/arm64/boot/dts/xilinx/Makefile | 1 + arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 446 ++++++++++++++++++++++ 2 files changed, 447 insertions(+) create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile index 922c5da39600..d15c9dc1d8f2 100644 --- a/arch/arm64/boot/dts/xilinx/Makefile +++ b/arch/arm64/boot/dts/xilinx/Makefile @@ -6,3 +6,4 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu111-revA.dtb diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts new file mode 100644 index 000000000000..b052ed837254 --- /dev/null +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts @@ -0,0 +1,446 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU111 + * + * (C) Copyright 2017 - 2018, Xilinx, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp.dtsi" +#include "zynqmp-clk.dtsi" +#include +#include + +/ { + model = "ZynqMP ZCU111 RevA"; + compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp"; + + aliases { + ethernet0 = &gem3; + gpio0 = &gpio; + i2c0 = &i2c0; + i2c1 = &i2c1; + mmc0 = &sdhci1; + rtc0 = &rtc; + serial0 = &uart0; + serial1 = &dcc; + usb0 = &usb0; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; + /* Another 4GB connected to PL */ + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + sw19 { + label = "sw19"; + gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + gpio-key,wakeup; + autorepeat; + }; + }; + + leds { + compatible = "gpio-leds"; + heartbeat_led { + label = "heartbeat"; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&dcc { + status = "okay"; +}; + +&fpd_dma_chan1 { + status = "okay"; +}; + +&fpd_dma_chan2 { + status = "okay"; +}; + +&fpd_dma_chan3 { + status = "okay"; +}; + +&fpd_dma_chan4 { + status = "okay"; +}; + +&fpd_dma_chan5 { + status = "okay"; +}; + +&fpd_dma_chan6 { + status = "okay"; +}; + +&fpd_dma_chan7 { + status = "okay"; +}; + +&fpd_dma_chan8 { + status = "okay"; +}; + +&gem3 { + status = "okay"; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + phy0: phy@c { + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + }; +}; + +&gpio { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + tca6416_u22: gpio@20 { + compatible = "ti,tca6416"; + reg = <0x20>; + gpio-controller; /* interrupt not connected */ + #gpio-cells = <2>; + /* + * IRQ not connected + * Lines: + * 0 - MAX6643_OT_B + * 1 - MAX6643_FANFAIL_B + * 2 - MIO26_PMU_INPUT_LS + * 4 - SFP_SI5382_INT_ALM + * 5 - IIC_MUX_RESET_B + * 6 - GEM3_EXP_RESET_B + * 10 - FMCP_HSPC_PRSNT_M2C_B + * 11 - CLK_SPI_MUX_SEL0 + * 12 - CLK_SPI_MUX_SEL1 + * 16 - IRPS5401_ALERT_B + * 17 - INA226_PMBUS_ALERT + * 3, 7, 13-15 - not connected + */ + }; + + i2cswitch@75 { /* u23 */ + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + i2c@0 { /* i2c mw 75 0 1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* PS_PMBUS */ + /* PMBUS_ALERT done via pca9544 */ + ina226@40 { /* u67 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <2000>; + }; + ina226@41 { /* u59 */ + compatible = "ti,ina226"; + reg = <0x41>; + shunt-resistor = <5000>; + }; + ina226@42 { /* u61 */ + compatible = "ti,ina226"; + reg = <0x42>; + shunt-resistor = <5000>; + }; + ina226@43 { /* u60 */ + compatible = "ti,ina226"; + reg = <0x43>; + shunt-resistor = <5000>; + }; + ina226@45 { /* u64 */ + compatible = "ti,ina226"; + reg = <0x45>; + shunt-resistor = <5000>; + }; + ina226@46 { /* u69 */ + compatible = "ti,ina226"; + reg = <0x46>; + shunt-resistor = <2000>; + }; + ina226@47 { /* u66 */ + compatible = "ti,ina226"; + reg = <0x47>; + shunt-resistor = <5000>; + }; + ina226@48 { /* u65 */ + compatible = "ti,ina226"; + reg = <0x48>; + shunt-resistor = <5000>; + }; + ina226@49 { /* u63 */ + compatible = "ti,ina226"; + reg = <0x49>; + shunt-resistor = <5000>; + }; + ina226@4a { /* u3 */ + compatible = "ti,ina226"; + reg = <0x4a>; + shunt-resistor = <5000>; + }; + ina226@4b { /* u71 */ + compatible = "ti,ina226"; + reg = <0x4b>; + shunt-resistor = <5000>; + }; + ina226@4c { /* u77 */ + compatible = "ti,ina226"; + reg = <0x4c>; + shunt-resistor = <5000>; + }; + ina226@4d { /* u73 */ + compatible = "ti,ina226"; + reg = <0x4d>; + shunt-resistor = <5000>; + }; + ina226@4e { /* u79 */ + compatible = "ti,ina226"; + reg = <0x4e>; + shunt-resistor = <5000>; + }; + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { /* i2c mw 75 0 4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */ + reg = <0x43>; + }; + irps5401_44: irps54012@44 { /* IRPS5401 - u55 */ + reg = <0x44>; + }; + irps5401_45: irps54012@45 { /* IRPS5401 - u57 */ + reg = <0x45>; + }; + /* u68 IR38064 +0 */ + /* u70 IR38060 +1 */ + /* u74 IR38060 +2 */ + /* u75 IR38060 +6 */ + /* J19 header too */ + + }; + i2c@3 { /* i2c mw 75 0 8 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* SYSMON */ + }; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + i2cswitch@74 { /* u26 */ + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + i2c@0 { /* i2c mw 74 0 1 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* + * IIC_EEPROM 1kB memory which uses 256B blocks + * where every block has different address. + * 0 - 256B address 0x54 + * 256B - 512B address 0x55 + * 512B - 768B address 0x56 + * 768B - 1024B address 0x57 + */ + eeprom: eeprom@54 { /* u88 */ + compatible = "atmel,24c08"; + reg = <0x54>; + }; + }; + i2c@1 { /* i2c mw 74 0 2 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + si5341: clock-generator1@36 { /* SI5341 - u46 */ + reg = <0x36>; + }; + + }; + i2c@2 { /* i2c mw 74 0 4 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + si570_1: clock-generator2@5d { /* USER SI570 - u47 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <300000000>; + clock-frequency = <300000000>; + }; + }; + i2c@3 { /* i2c mw 74 0 8 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + si570_2: clock-generator3@5d { /* USER MGT SI570 - u49 */ + #clock-cells = <0>; + compatible = "silabs,si570"; + reg = <0x5d>; + temperature-stability = <50>; + factory-fout = <156250000>; + clock-frequency = <148500000>; + }; + }; + i2c@4 { /* i2c mw 74 0 10 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + si5328: clock-generator4@69 { /* SI5328 - u48 */ + reg = <0x69>; + }; + }; + i2c@5 { /* i2c mw 74 0 11 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + sc18is603@2f { /* sc18is602 - u93 */ + compatible = "nxp,sc18is603"; + reg = <0x2f>; + /* 4 gpios for CS not handled by driver */ + /* + * USB2ANY cable or + * LMK04208 - u90 or + * LMX2594 - u102 or + * LMX2594 - u103 or + * LMX2594 - u104 + */ + }; + }; + i2c@6 { /* i2c mw 74 0 11 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* FMC connector */ + }; + /* 7 NC */ + }; + + i2cswitch@75 { + compatible = "nxp,pca9548"; /* u27 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + /* FMCP_HSPC_IIC */ + }; + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* NC */ + }; + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + /* SYSMON */ + }; + i2c@3 { /* i2c mw 75 0 8 */ + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + /* DDR4 SODIMM */ + }; + i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + /* SFP3 */ + }; + i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + /* SFP2 */ + }; + i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + /* SFP1 */ + }; + i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + /* SFP0 */ + }; + }; +}; + +&rtc { + status = "okay"; +}; + +&sata { + status = "okay"; + /* SATA OOB timing settings */ + ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; + ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; + ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; + ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; + ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; +}; + +/* SD1 with level shifter */ +&sdhci1 { + status = "okay"; + no-1-8-v; +}; + +&uart0 { + status = "okay"; +}; + +/* ULPI SMSC USB3320 */ +&usb0 { + status = "okay"; +};