Message ID | a715ca92713ca02071f33dcca9960a66a03c949a.1649702729.git.baruch@tkos.co.il (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/3] spi: add SPI_RX_CPHA_FLIP mode bit | expand |
On Mon, 11 Apr 2022 21:45:27 +0300, Baruch Siach wrote: > From: Baruch Siach <baruch.siach@siklu.com> > > Some SPI devices latch MOSI bits on one clock phase, but produce valid > MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the > controller driver to flip CPHA for Rx (MISO) only transfers. > > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/3] spi: add SPI_RX_CPHA_FLIP mode bit commit: b617be33502d2bfefffef71924c7a7ba50264ff6 [2/3] spi: spidev: add SPI_RX_CPHA_FLIP commit: 178d0cbbfe8ec652083058968c7a27485eaa33d2 [3/3] spi: spi-imx: add support for SPI_RX_CPHA_FLIP commit: 79422ed9bd7fbd79f84d8a5abb0094c16221f55b All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/include/uapi/linux/spi/spi.h b/include/uapi/linux/spi/spi.h index 236a85f08ded..9d5f58059703 100644 --- a/include/uapi/linux/spi/spi.h +++ b/include/uapi/linux/spi/spi.h @@ -27,6 +27,7 @@ #define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */ #define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */ #define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */ +#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */ /* * All the bits defined above should be covered by SPI_MODE_USER_MASK. @@ -36,6 +37,6 @@ * These bits must not overlap. A static assert check should make sure of that. * If adding extra bits, make sure to increase the bit index below as well. */ -#define SPI_MODE_USER_MASK (_BITUL(16) - 1) +#define SPI_MODE_USER_MASK (_BITUL(17) - 1) #endif /* _UAPI_SPI_H */