diff mbox series

[PATCHv2,1/9] soc: qcom: llcc: Add support for 16 ways of allocation

Message ID a7a5f64259c2c02628f03fb59b91e9fa78da2dfb.1643355594.git.quic_saipraka@quicinc.com (mailing list archive)
State New, archived
Headers show
Series soc: qcom: llcc: Add LLCC support for SM8450 SoC | expand

Commit Message

Sai Prakash Ranjan Jan. 28, 2022, 7:47 a.m. UTC 
From: Huang Yiwei <hyiwei@codeaurora.org>

Add support for 16 ways of allocation for LLCC HW version 2.1.0
and later.

Signed-off-by: Huang Yiwei <hyiwei@codeaurora.org>
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
---
 drivers/soc/qcom/llcc-qcom.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index ec52f29c8867..b3a34f117a7c 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -29,8 +29,8 @@ 
 #define ATTR1_FIXED_SIZE_SHIFT        0x03
 #define ATTR1_PRIORITY_SHIFT          0x04
 #define ATTR1_MAX_CAP_SHIFT           0x10
-#define ATTR0_RES_WAYS_MASK           GENMASK(11, 0)
-#define ATTR0_BONUS_WAYS_MASK         GENMASK(27, 16)
+#define ATTR0_RES_WAYS_MASK           GENMASK(15, 0)
+#define ATTR0_BONUS_WAYS_MASK         GENMASK(31, 16)
 #define ATTR0_BONUS_WAYS_SHIFT        0x10
 #define LLCC_STATUS_READ_DELAY        100