| Message ID | aa6fe473-71f2-edba-f009-994a3dbc9802@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/2] dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml | expand |
On 29/12/2022 10:44, Johan Jonker wrote: > Convert rockchip-dp-phy.txt to yaml. > > Changed: > rename file name > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 29-12-22, 10:44, Johan Jonker wrote: > Convert rockchip-dp-phy.txt to yaml. This series fails to apply, pls rebase > > Changed: > rename file name This should not be in change log but after the --- line > > Signed-off-by: Johan Jonker <jbx6244@gmail.com> > --- > > Changed V2: > Use the compatible as filename. > --- > .../bindings/phy/rockchip,rk3288-dp-phy.yaml | 41 +++++++++++++++++++ > .../bindings/phy/rockchip-dp-phy.txt | 26 ------------ > 2 files changed, 41 insertions(+), 26 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml > delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > > diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml > new file mode 100644 > index 000000000..2538235c5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml > @@ -0,0 +1,41 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip specific extensions to the Analogix Display Port PHY > + > +maintainers: > + - Heiko Stuebner <heiko@sntech.de> > + > +properties: > + compatible: > + const: rockchip,rk3288-dp-phy > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: 24m > + > + "#phy-cells": > + const: 0 > + > +required: > + - compatible > + - clocks > + - clock-names > + - "#phy-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/rk3288-cru.h> > + edp-phy { > + compatible = "rockchip,rk3288-dp-phy"; > + clocks = <&cru SCLK_EDP_24M>; > + clock-names = "24m"; > + #phy-cells = <0>; > + }; > diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > deleted file mode 100644 > index e3b4809fb..000000000 > --- a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > +++ /dev/null > @@ -1,26 +0,0 @@ > -Rockchip specific extensions to the Analogix Display Port PHY > ------------------------------------- > - > -Required properties: > -- compatible : should be one of the following supported values: > - - "rockchip.rk3288-dp-phy" > -- clocks: from common clock binding: handle to dp clock. > - of memory mapped region. > -- clock-names: from common clock binding: > - Required elements: "24m" > -- #phy-cells : from the generic PHY bindings, must be 0; > - > -Example: > - > -grf: syscon@ff770000 { > - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; > - > -... > - > - edp_phy: edp-phy { > - compatible = "rockchip,rk3288-dp-phy"; > - clocks = <&cru SCLK_EDP_24M>; > - clock-names = "24m"; > - #phy-cells = <0>; > - }; > -}; > -- > 2.20.1
On 1/13/23 19:08, Vinod Koul wrote: > On 29-12-22, 10:44, Johan Jonker wrote: >> Convert rockchip-dp-phy.txt to yaml. > > This series fails to apply, pls rebase Hi Vinod, Heiko, This serie and others must be combined in the right order to grf.yaml. Maybe better that Heiko does that with your ACK. Johan === Apply after: dt-bindings: soc: rockchip: grf: add rockchip,lvds.yaml >> >> Changed: >> rename file name > > This should not be in change log but after the --- line > >> >> Signed-off-by: Johan Jonker <jbx6244@gmail.com> >> --- >> >> Changed V2: >> Use the compatible as filename. >> --- >> .../bindings/phy/rockchip,rk3288-dp-phy.yaml | 41 +++++++++++++++++++ >> .../bindings/phy/rockchip-dp-phy.txt | 26 ------------ >> 2 files changed, 41 insertions(+), 26 deletions(-) >> create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml >> delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt >> >> diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml >> new file mode 100644 >> index 000000000..2538235c5 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml >> @@ -0,0 +1,41 @@ >> +# SPDX-License-Identifier: GPL-2.0 >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Rockchip specific extensions to the Analogix Display Port PHY >> + >> +maintainers: >> + - Heiko Stuebner <heiko@sntech.de> >> + >> +properties: >> + compatible: >> + const: rockchip,rk3288-dp-phy >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + const: 24m >> + >> + "#phy-cells": >> + const: 0 >> + >> +required: >> + - compatible >> + - clocks >> + - clock-names >> + - "#phy-cells" >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/rk3288-cru.h> >> + edp-phy { >> + compatible = "rockchip,rk3288-dp-phy"; >> + clocks = <&cru SCLK_EDP_24M>; >> + clock-names = "24m"; >> + #phy-cells = <0>; >> + }; >> diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt >> deleted file mode 100644 >> index e3b4809fb..000000000 >> --- a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt >> +++ /dev/null >> @@ -1,26 +0,0 @@ >> -Rockchip specific extensions to the Analogix Display Port PHY >> ------------------------------------- >> - >> -Required properties: >> -- compatible : should be one of the following supported values: >> - - "rockchip.rk3288-dp-phy" >> -- clocks: from common clock binding: handle to dp clock. >> - of memory mapped region. >> -- clock-names: from common clock binding: >> - Required elements: "24m" >> -- #phy-cells : from the generic PHY bindings, must be 0; >> - >> -Example: >> - >> -grf: syscon@ff770000 { >> - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; >> - >> -... >> - >> - edp_phy: edp-phy { >> - compatible = "rockchip,rk3288-dp-phy"; >> - clocks = <&cru SCLK_EDP_24M>; >> - clock-names = "24m"; >> - #phy-cells = <0>; >> - }; >> -}; >> -- >> 2.20.1 >
On 13-01-23, 20:58, Johan Jonker wrote: > > > On 1/13/23 19:08, Vinod Koul wrote: > > On 29-12-22, 10:44, Johan Jonker wrote: > >> Convert rockchip-dp-phy.txt to yaml. > > > > This series fails to apply, pls rebase > > Hi Vinod, Heiko, > > This serie and others must be combined in the right order to grf.yaml. > Maybe better that Heiko does that with your ACK. Sure: Acked-By: Vinod Koul <vkoul@kernel.org>
On Thu, 29 Dec 2022 10:44:28 +0100, Johan Jonker wrote: > Convert rockchip-dp-phy.txt to yaml. > > Changed: > rename file name > > Applied, thanks! [1/2] dt-bindings: phy: rockchip: convert rockchip-dp-phy.txt to yaml commit: fc7b83bcaf0334a80d175ab6b280fd838e8a5596 [2/2] dt-bindings: soc: rockchip: grf: add rockchip,rk3288-dp-phy.yaml commit: 51b2089284f3f08ca8971b65d5b2f66f926f7d14 Best regards,
diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml new file mode 100644 index 000000000..2538235c5 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip specific extensions to the Analogix Display Port PHY + +maintainers: + - Heiko Stuebner <heiko@sntech.de> + +properties: + compatible: + const: rockchip,rk3288-dp-phy + + clocks: + maxItems: 1 + + clock-names: + const: 24m + + "#phy-cells": + const: 0 + +required: + - compatible + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3288-cru.h> + edp-phy { + compatible = "rockchip,rk3288-dp-phy"; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt deleted file mode 100644 index e3b4809fb..000000000 --- a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt +++ /dev/null @@ -1,26 +0,0 @@ -Rockchip specific extensions to the Analogix Display Port PHY ------------------------------------- - -Required properties: -- compatible : should be one of the following supported values: - - "rockchip.rk3288-dp-phy" -- clocks: from common clock binding: handle to dp clock. - of memory mapped region. -- clock-names: from common clock binding: - Required elements: "24m" -- #phy-cells : from the generic PHY bindings, must be 0; - -Example: - -grf: syscon@ff770000 { - compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd"; - -... - - edp_phy: edp-phy { - compatible = "rockchip,rk3288-dp-phy"; - clocks = <&cru SCLK_EDP_24M>; - clock-names = "24m"; - #phy-cells = <0>; - }; -};
Convert rockchip-dp-phy.txt to yaml. Changed: rename file name Signed-off-by: Johan Jonker <jbx6244@gmail.com> --- Changed V2: Use the compatible as filename. --- .../bindings/phy/rockchip,rk3288-dp-phy.yaml | 41 +++++++++++++++++++ .../bindings/phy/rockchip-dp-phy.txt | 26 ------------ 2 files changed, 41 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt -- 2.20.1