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Tue, 25 Apr 2017 17:56:06 +0000 Subject: Re: [PATCH] ARM/shmem: Drop page coloring align for non-VIPT CPUs To: Russell King - ARM Linux References: <20170414100953.4703-1-dsafonov@virtuozzo.com> <571024bf-892d-4d08-dd9e-654b1e28c23e@virtuozzo.com> <20170425173546.GS17774@n2100.armlinux.org.uk> From: Dmitry Safonov Message-ID: Date: Tue, 25 Apr 2017 20:51:58 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.0 MIME-Version: 1.0 In-Reply-To: <20170425173546.GS17774@n2100.armlinux.org.uk> Content-Language: en-US X-Originating-IP: [195.214.232.6] X-ClientProxiedBy: HE1PR09CA0069.eurprd09.prod.outlook.com (10.174.50.141) To HE1PR0801MB1738.eurprd08.prod.outlook.com (10.168.149.150) X-MS-Office365-Filtering-Correlation-Id: 6e072f54-bb93-49e8-3f67-08d48c0458f8 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(201703131423075)(201703031133081); SRVR:HE1PR0801MB1738; X-Microsoft-Exchange-Diagnostics: 1; HE1PR0801MB1738; 3:K8VpWuXAXaYfwbl/VknYjTz0pW0hvkTvx3oiswXu7fR2FJyv7++dh7RPmZLww/wb3fefHa+zCtzqyJgNBfYEleif06RToPygvr/O+uf8njfyV5uJcPdJzWKRIXCcTeXpiWzg2Jq0nGyqCANZQTBkShHMSwUZ1PlC869h1V6YIkC65A5TvYilbsnC3VgnCNvwgPiFfMmZr7xmZWUI7rTvnHc7kgkhWc5SKYxkWXEVbPcJd9zzh2bct5BJjmDp0QcCXpCZVjGTeY/bAsl41jmvZRVgii4v9zh3ZqQYUe9Hgk81lPyK4rJrgWOOw52biog1+nnM78I81JNs9LF60qU6LQ==; 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20:IR41OwbWAkHZCV+OfeH0Nuprz0TUlGZCNBgI+riAG6PeHPkEaI4BgZbCMkSW80CiyvavfmaYUQwlY4CkrZGLPijdA3Sn9Ex3cp95lAVo4lfx4lMgANMNaYw+Ni11Qw2Ne4MKkrrTuCNYTt1Hxwm+5B4W0ONE528VVHf5dhwRkEA= X-OriginatorOrg: virtuozzo.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2017 17:56:06.2511 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0801MB1738 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170425_105630_389824_E005D86A X-CRM114-Status: GOOD ( 20.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: 0x7f454c46@gmail.com, Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP On 04/25/2017 08:35 PM, Russell King - ARM Linux wrote: > On Tue, Apr 25, 2017 at 08:19:21PM +0300, Dmitry Safonov wrote: >> On 04/14/2017 01:09 PM, Dmitry Safonov wrote: >>> On ARMv6 CPUs with VIPT caches there are aliasing issues: if two >>> different cache line indexes correspond to the same physical >>> address, then changes made to one of the alias might be lost >>> or they can overwrite each other. To overcome aliasing issues, >>> the align for shared mappings was introduced with: >>> >>> commit 4197692eef113eeb8e3e413cc70993a5e667e5b8 >>> Author: Russell King >>> Date: Wed Apr 28 22:22:33 2004 +0100 >>> >>> [ARM] Fix shared mmap()ings for ARM VIPT caches. >>> >>> This allows us to appropriately align shared mappings on VIPT caches >>> with aliasing issues. >>> >>> Which introduced 4 pages align with SHMLBA, which resulted in >>> unique physical address after any tag in cache (because two upper bits >>> corresponding to page address get unused in tags). >>> >>> As this workaround is not needed by non-VIPT caches (like most armv7 >>> CPUs which have PIPT caches), ARM mmap() code checks if cache is VIPT >>> aliasing for MAP_SHARED. >>> >>> The problem here is in shmat() syscall: >>> 1. if shmaddr is NULL then do_shmat() uses arch_get_unmapped_area() >>> to allocate shared mapping. >>> 2. if shmaddr is specified then do_shmat() checks that address has >>> SHMLBA alignment regardless to CPU cache aliasing. >>> >>> Which results on ARMv7 CPUs that shmat() with NULL shmaddr may return >>> non-SHMLBA aligned address (page-aligned), but shmat() with the same >>> address will fail. >>> >>> That is not critical issue for CRIU as after shmat() with NULL address, > > CRIU? Please try to keep use of acronyms to a minimum. Ok. > >>> we can mremap() resulted shmem to restore shared memory mappings on the >>> same address where they were on checkpointing. >>> But it's still worth fixing because we can't reliably tell from >>> userspace if the platform has VIPT cache, and so this mremap() >>> workaround is done with HUGE warning that restoring application, that >>> uses SHMBLA-unaligned shmem on ARMv6 CPU with VIPT cache may result >>> in data corruptions. >>> >>> I also changed SHMLBA build-time check to init-time WARN_ON(), as >>> it's not constant afterward. > > I'm not happy with this. SHMLBA is defined by POSIX to be a constant, > which means that if we want to have any kind of binary compatibility > between different architecture versions, SHMLBA must be constant across > all variants of the architecture. > > Making it dependent on the cache architecture means that userspace's > assumptions can be broken. Increasing it is not an issue (since SHMLBA > is defined to be the address multiple - an address that is aligned to > 4-page is also by definition aligned to 1-page.) So what I did back in > 2004 wasn't a problem. > > However, reducing it (as you're now suggesting) is - newly built programs > are built today with: > > #define SHMLBA (__getpagesize () << 2) > > so we must not allow the kernel to return addresses that violate that. > As I say, we can't reduce SHMLBA now. Thanks for the reply! Hmm, so what do you think if we align then shmat(smid, NULL, shmflg) allocations also? (with 0 == shmaddr) Something like below: --- >8 --- diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index 2239fde10b80..ac52f066f47f 100644 return addr; @@ -112,22 +106,16 @@ arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0, struct mm_struct *mm = current->mm; unsigned long addr = addr0; int do_align = 0; - int aliasing = cache_is_vipt_aliasing(); struct vm_unmapped_area_info info; - /* - * We only need to do colour alignment if either the I or D - * caches alias. - */ - if (aliasing) - do_align = filp || (flags & MAP_SHARED); + do_align = filp || (flags & MAP_SHARED); /* requested length too big for entire address space */ if (len > TASK_SIZE) return -ENOMEM; if (flags & MAP_FIXED) { - if (aliasing && flags & MAP_SHARED && + if (flags & MAP_SHARED && (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) return -EINVAL; return addr; --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c @@ -59,21 +59,15 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, struct mm_struct *mm = current->mm; struct vm_area_struct *vma; int do_align = 0; - int aliasing = cache_is_vipt_aliasing(); struct vm_unmapped_area_info info; - /* - * We only need to do colour alignment if either the I or D - * caches alias. - */ - if (aliasing) - do_align = filp || (flags & MAP_SHARED); + do_align = filp || (flags & MAP_SHARED); /* * We enforce the MAP_FIXED case. */ if (flags & MAP_FIXED) { - if (aliasing && flags & MAP_SHARED && + if (flags & MAP_SHARED && (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1)) return -EINVAL;