Message ID | af9ffc2a1a4894ae26077b8ea46382e6585c9931.1500552941.git.michal.simek@xilinx.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id 24sm8341695wrw.0.2017.07.20.05.17.24 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 20 Jul 2017 05:17:24 -0700 (PDT) From: Michal Simek <michal.simek@xilinx.com> To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 04/10] arm64: zynqmp: Add dcc console for zynqmp Date: Thu, 20 Jul 2017 14:17:03 +0200 Message-Id: <af9ffc2a1a4894ae26077b8ea46382e6585c9931.1500552941.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com> References: <cover.1500552941.git.michal.simek@xilinx.com> In-Reply-To: <cover.1500552941.git.michal.simek@xilinx.com> References: <cover.1500552941.git.michal.simek@xilinx.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170720_051748_334477_EBC31EBB X-CRM114-Status: UNSURE ( 9.36 ) X-CRM114-Notice: Please train this message. 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diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 50636e098724..3657fdbdb552 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -95,6 +95,11 @@ }; }; + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupt-parent = <&gic>;
Add debug console to dtsi to be able to enable it in board dts file. Keep in your mind that every core has separate dcc port in case you want to run SMP kernel. DCC is very helpful communication channel for debugging. Signed-off-by: Michal Simek <michal.simek@xilinx.com> --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 5 +++++ 1 file changed, 5 insertions(+)