@@ -6,17 +6,24 @@ The MediaTek AUDSYS controller provides various clocks to the system.
Required Properties:
- compatible: Should be one of:
- - "mediatek,mt7622-audsys", "syscon"
+ - "mediatek,mt2701-audsys",
+ - "mediatek,mt7622-audsys",
- #clock-cells: Must be 1
The AUDSYS controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+Must be a subnode of MediaTek audio subsystem device tree node.
+See ../mfd/mtk-audsys.txt for details about the parent node.
+
Example:
-audsys: audsys@11220000 {
- compatible = "mediatek,mt7622-audsys", "syscon";
- reg = <0 0x11220000 0 0x1000>;
- #clock-cells = <1>;
-};
+ audio-subsystm@11220000 {
+ compatible = "mediatek,mt2701-audsys-core";
+ ...
+ audsys: clock {
+ compatible = "mediatek,mt2701-audsys";
+ #clock-cells = <1>;
+ };
+ };
Update the DT binding to adapt the new audio subsystem wrapper. Also add a compatible string for MT2701. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> --- .../bindings/arm/mediatek/mediatek,audsys.txt | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-)