From patchwork Mon Aug 12 16:55:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Pitre X-Patchwork-Id: 2843121 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 965AA9F271 for ; Mon, 12 Aug 2013 16:55:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8F8FE20314 for ; Mon, 12 Aug 2013 16:55:58 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 188AD2021C for ; Mon, 12 Aug 2013 16:55:57 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1V8vPO-0007bk-5I; Mon, 12 Aug 2013 16:55:54 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V8vPL-0006zO-Mz; Mon, 12 Aug 2013 16:55:51 +0000 Received: from relais.videotron.ca ([24.201.245.36]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1V8vPI-0006wy-Cj for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2013 16:55:49 +0000 MIME-version: 1.0 Received: from xanadu.home ([70.83.209.44]) by VL-VM-MR005.ip.videotron.ca (Oracle Communications Messaging Exchange Server 7u4-22.01 64bit (built Apr 21 2011)) with ESMTP id <0MRF00MDNGCBJAB0@VL-VM-MR005.ip.videotron.ca> for linux-arm-kernel@lists.infradead.org; Mon, 12 Aug 2013 12:55:23 -0400 (EDT) Date: Mon, 12 Aug 2013 12:55:23 -0400 (EDT) From: Nicolas Pitre To: Dave Martin Subject: Re: Build error: versatile express In-reply-to: <20130812124801.GB2823@localhost.localdomain> Message-id: References: <20130812124801.GB2823@localhost.localdomain> User-Agent: Alpine 2.03 (LFD 1266 2009-07-14) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130812_125548_461075_EC976AE8 X-CRM114-Status: GOOD ( 23.24 ) X-Spam-Score: -1.9 (-) Cc: Russell King - ARM Linux , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Mon, 12 Aug 2013, Dave Martin wrote: > On Mon, Aug 12, 2013 at 11:28:04AM +0100, Russell King - ARM Linux wrote: > > arch/arm/mach-vexpress/tc2_pm.c: In function 'tc2_pm_down.clone.0': > > arch/arm/mach-vexpress/tc2_pm.c:200:1: error: fp cannot be used in asm here > > > > This is caused by the assembly code in this file clobbering R11, which > > is incompatible with having CONFIG_FRAME_POINTER=y. > > Is there any reason not to fix this just by pushing/popping r11 inside > the asm and removing it from the clobber list? That's most likely the best fix. What about this? ---- >8 From: Nicolas Pitre Date: Mon, 12 Aug 2013 12:47:13 -0400 Subject: [PATCH] ARM: vexpress/MCPM: fix cache disable sequence when CONFIG_FRAME_POINTER=y If CONFIG_FRAME_POINTER=y we hget the following error: arch/arm/mach-vexpress/tc2_pm.c: In function 'tc2_pm_down': arch/arm/mach-vexpress/tc2_pm.c:200:1: error: fp cannot be used in asm here Let's fix that by explicitly preserving r11 on the stack and removing it from the clobber list. Reported-by: Russell King Signed-off-by: Nicolas Pitre > > Since there are no "m" constraints or similar, there should be no > implicit references to fp or sp inside the asm which would be disrupted > by that. > > We could #ifdef it on CONFIG_FRAME_POINTER, but that probably just > uglifies the code for no real benefit. > > > FRAME_POINTER depends on !THUMB2_KERNEL, so we shouldn't hit the same > issue with r7 in Thumb-2. > > Cheers > ---Dave > Reviewed-by: Dave Martin diff --git a/arch/arm/mach-vexpress/dcscb.c b/arch/arm/mach-vexpress/dcscb.c index 85fffa702f..3a6384c6c4 100644 --- a/arch/arm/mach-vexpress/dcscb.c +++ b/arch/arm/mach-vexpress/dcscb.c @@ -144,8 +144,13 @@ static void dcscb_power_down(void) * Let's do it in the safest possible way i.e. with * no memory access within the following sequence * including to the stack. + * + * Note: fp is preserved to the stack explicitly prior doing + * this since adding it to the clobber list is incompatible + * with having CONFIG_FRAME_POINTER=y. */ asm volatile( + "str fp, [sp, #-4]! \n\t" "mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t" "bic r0, r0, #"__stringify(CR_C)" \n\t" "mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t" @@ -156,9 +161,10 @@ static void dcscb_power_down(void) "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" "mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t" "isb \n\t" - "dsb " + "dsb \n\t" + "ldr fp, [sp], #4" : : : "r0","r1","r2","r3","r4","r5","r6","r7", - "r9","r10","r11","lr","memory"); + "r9","r10","lr","memory"); /* * This is a harmless no-op. On platforms with a real @@ -182,6 +188,7 @@ static void dcscb_power_down(void) * Let's do it in the safest possible way as above. */ asm volatile( + "str fp, [sp, #-4]! \n\t" "mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t" "bic r0, r0, #"__stringify(CR_C)" \n\t" "mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t" @@ -192,9 +199,10 @@ static void dcscb_power_down(void) "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" "mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t" "isb \n\t" - "dsb " + "dsb \n\t" + "ldr fp, [sp], #4" : : : "r0","r1","r2","r3","r4","r5","r6","r7", - "r9","r10","r11","lr","memory"); + "r9","r10","lr","memory"); } __mcpm_cpu_down(cpu, cluster); diff --git a/arch/arm/mach-vexpress/tc2_pm.c b/arch/arm/mach-vexpress/tc2_pm.c index dfb55d45b6..9419b1550a 100644 --- a/arch/arm/mach-vexpress/tc2_pm.c +++ b/arch/arm/mach-vexpress/tc2_pm.c @@ -139,8 +139,13 @@ static void tc2_pm_down(u64 residency) * Let's do it in the safest possible way i.e. with * no memory access within the following sequence * including the stack. + * + * Note: fp is preserved to the stack explicitly prior doing + * this since adding it to the clobber list is incompatible + * with having CONFIG_FRAME_POINTER=y. */ asm volatile( + "str fp, [sp, #-4]! \n\t" "mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t" "bic r0, r0, #"__stringify(CR_C)" \n\t" "mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t" @@ -151,9 +156,10 @@ static void tc2_pm_down(u64 residency) "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" "mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t" "isb \n\t" - "dsb " + "dsb \n\t" + "ldr fp, [sp], #4" : : : "r0","r1","r2","r3","r4","r5","r6","r7", - "r9","r10","r11","lr","memory"); + "r9","r10","lr","memory"); cci_disable_port_by_cpu(mpidr); @@ -174,6 +180,7 @@ static void tc2_pm_down(u64 residency) * Let's do it in the safest possible way as above. */ asm volatile( + "str fp, [sp, #-4]! \n\t" "mrc p15, 0, r0, c1, c0, 0 @ get CR \n\t" "bic r0, r0, #"__stringify(CR_C)" \n\t" "mcr p15, 0, r0, c1, c0, 0 @ set CR \n\t" @@ -184,9 +191,10 @@ static void tc2_pm_down(u64 residency) "bic r0, r0, #(1 << 6) @ disable local coherency \n\t" "mcr p15, 0, r0, c1, c0, 1 @ set AUXCR \n\t" "isb \n\t" - "dsb " + "dsb \n\t" + "ldr fp, [sp], #4" : : : "r0","r1","r2","r3","r4","r5","r6","r7", - "r9","r10","r11","lr","memory"); + "r9","r10","lr","memory"); } __mcpm_cpu_down(cpu, cluster);