From patchwork Thu Dec 5 19:29:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolas Pitre X-Patchwork-Id: 3290961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D77819F388 for ; Thu, 5 Dec 2013 19:29:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D5C5F20457 for ; Thu, 5 Dec 2013 19:29:55 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E490120213 for ; Thu, 5 Dec 2013 19:29:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoecO-0003Oq-Co; Thu, 05 Dec 2013 19:29:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoecL-0003Gw-Te; Thu, 05 Dec 2013 19:29:45 +0000 Received: from mail-qe0-f52.google.com ([209.85.128.52]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VoecJ-0003Gb-MS for linux-arm-kernel@lists.infradead.org; Thu, 05 Dec 2013 19:29:44 +0000 Received: by mail-qe0-f52.google.com with SMTP id ne12so17762616qeb.39 for ; Thu, 05 Dec 2013 11:29:22 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:user-agent :mime-version:content-type; bh=efFH20EQZr5gFDyIRyvKONhkrkRXNAIO3EXyEGwzrfY=; b=nKZanRBsgGn+cGhcywcA2Vky9gWN6E/QQDNiCuz5E8f0Cl/1X0Lbdy9ggVvXmxNMgb jK0OgpL7PclG1iyfJ/1msG8fEqpyWFAHvXqjKNJi4/yFVAUslmG1BB/MJpy9DkNtm5ZC 5EW3enTfJLi1B2bLcaoVd98JK+SrCeG8p4r1PSyezcPSweF88l2jE9utjunbRq3KY7V5 rVpdTC/8Mj6+Oe+HqjZUl7sYZ1/WDOmTrbvwtsLhPWNslMmrqoaKhqJVPXm+xXBWtHCF rqoZcjLszcAOd4vSdfZ/QtR16T5M4V/HxLpIHBWvdXCnfvb/yruq4ZkS7cwS50/3NP54 JXqA== X-Gm-Message-State: ALoCoQkS+iehLoomMfzsjLW4EW9R/XHl50IigwBL6SP3/3VBfEKXHNXF8gzI2bcwRuqGUlQ8yIe7 X-Received: by 10.224.136.136 with SMTP id r8mr123125159qat.0.1386271762424; Thu, 05 Dec 2013 11:29:22 -0800 (PST) Received: from [2607:fa48:6d48:fb10:21c:c0ff:fe2a:325b] ([2607:fa48:6d48:fb10:21c:c0ff:fe2a:325b]) by mx.google.com with ESMTPSA id r5sm248896277qaj.13.2013.12.05.11.29.21 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 05 Dec 2013 11:29:21 -0800 (PST) Date: Thu, 5 Dec 2013 14:29:21 -0500 (EST) From: Nicolas Pitre To: Russell King - ARM Linux Subject: [PATCH] clean up cache handling in core code Message-ID: User-Agent: Alpine 2.10 (LFD 1266 2009-07-14) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131205_142943_769501_A470E1E2 X-CRM114-Status: UNSURE ( 9.61 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ----- Message Text ----- We have a handy macro to replace open coded __cpuc_flush_dcache_area(() and outer_clean_range() sequences. Let's use it. No functional change. Signed-off-by: Nicolas Pitre diff --git a/arch/arm/common/mcpm_entry.c b/arch/arm/common/mcpm_entry.c index 26020a03f6..87c5f1b595 100644 --- a/arch/arm/common/mcpm_entry.c +++ b/arch/arm/common/mcpm_entry.c @@ -35,8 +35,7 @@ void mcpm_set_early_poke(unsigned cpu, unsigned cluster, unsigned long *poke = &mcpm_entry_early_pokes[cluster][cpu][0]; poke[0] = poke_phys_addr; poke[1] = poke_val; - __cpuc_flush_dcache_area((void *)poke, 8); - outer_clean_range(__pa(poke), __pa(poke + 2)); + __sync_cache_range_w(poke, 2 * sizeof(*poke)); } static const struct mcpm_platform_ops *platform_ops; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index dc894ab362..8c61325b8b 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -105,8 +105,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) secondary_data.pgdir = get_arch_pgd(idmap_pgd); secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir); #endif - __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); - outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); + sync_cache_w(&secondary_data); /* * Now bring the CPU into our world.