Message ID | b72ce26cb73afd042d65f737971f560a491e1275.1544125558.git.horms+renesas@verge.net.au (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [GIT,PULL] Second Round of Renesas ARM Based SoC DT Updates for v4.21 | expand |
diff --git a/arch/arm/boot/dts/iwg20d-q7-common.dtsi b/arch/arm/boot/dts/iwg20d-q7-common.dtsi index ca9154dd8052..e2b1ab9b56e5 100644 --- a/arch/arm/boot/dts/iwg20d-q7-common.dtsi +++ b/arch/arm/boot/dts/iwg20d-q7-common.dtsi @@ -116,6 +116,10 @@ status = "okay"; }; +&cmt0 { + status = "okay"; +}; + &hsusb { status = "okay"; pinctrl-0 = <&usb0_pins>; @@ -230,6 +234,11 @@ }; }; +&rwdt { + timeout-sec = <60>; + status = "okay"; +}; + &scif0 { pinctrl-0 = <&scif0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi index 0e2e033cc849..b3fee1d61c87 100644 --- a/arch/arm/boot/dts/r8a7743-iwg20m.dtsi +++ b/arch/arm/boot/dts/r8a7743-iwg20m.dtsi @@ -31,10 +31,6 @@ }; }; -&cmt0 { - status = "okay"; -}; - &extal_clk { clock-frequency = <20000000>; }; @@ -88,11 +84,6 @@ }; }; -&rwdt { - timeout-sec = <60>; - status = "okay"; -}; - &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default";