From patchwork Tue Dec 5 16:51:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 13480472 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BE8DC10F05 for ; Tue, 5 Dec 2023 16:53:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ia1pOF8u+oMPr3zZYYGGtt3bQs7rKe/eoDnBKs6tmUs=; b=tz1tqxQlwvc8KY HhZwgNl4Kem5y0iDTwfTFm39gzUPabAcgF9sH6aXtEd3GCrTp+8THyp+w/HDtTVc6SkdlcL4Mx/5l ALRSN9Sd2VeMJ9RDZkDtb1sMgiwUlrf0Tva0A+2aSr6WWX1Z9eIcmYaT9EzVkATFrRAdo2NF/IXKk FjcKnvPhnmoB9IgawHl5fmnDTM78Gwc4H7jN6t3hMX5aHmlOhicJNZLnHThFSzjv1MZteFiFRxk73 4lJV87mhHI9I+zs9pduPe3MdKNVia1yG8fefsx417X4jLQ2+gHnl173ZHMEnN1FQ7NkfrwEiEvLwO 3k+R4wzcFLBsH21kriKA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rAYeu-007wek-1M; Tue, 05 Dec 2023 16:52:32 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rAYeg-007wNz-1z for linux-arm-kernel@bombadil.infradead.org; Tue, 05 Dec 2023 16:52:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=x0y6WeeVXrQeR63nYyQvvY2E/px/vaeK53HeQVRWoZI=; b=juD1qukWdBAjb57K4y1jdcJ0Mm ovZHp/S1nXxmNn02gb+EGmeAZ7cVqzWNabK0vi+yMVbl1RPIe7SCjDWwFt4aq4TChbG+gPHBDH5L1 286j8vvpdUB9CT8tq8eJHFgvkXaUbqtJrVsTrBUuw6A14iPFBcvskunKyVY0haAq2q2bwHAytsVNM ySl7xD/Kxg7XSPcinT45ea+UCKoDzfaUYd/kdxiN9p15MsOcXyVIXBzPp235Q3IzKmrPwOa/X/fiI 5J1S6Z/EvsUYQdJTsafER/iGBsGJvGmExCguMgoE73ACk8poqMkCKbTyPzqXnkBQDYjUJcJ9qvPPL y5nl71Hw==; Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rAYec-004oLm-1T for linux-arm-kernel@lists.infradead.org; Tue, 05 Dec 2023 16:52:17 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2C2371570; Tue, 5 Dec 2023 08:52:58 -0800 (PST) Received: from e121345-lin.cambridge.arm.com (e121345-lin.cambridge.arm.com [10.1.196.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 29B503F5A1; Tue, 5 Dec 2023 08:52:10 -0800 (PST) From: Robin Murphy To: will@kernel.org Cc: mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, suzuki.poulose@arm.com, ilkka@os.amperecomputing.com, bwicaksono@nvidia.com, YWan@nvidia.com, rwiley@nvidia.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: [PATCH 4/5] dt-bindings/perf: Add Arm CoreSight PMU Date: Tue, 5 Dec 2023 16:51:57 +0000 Message-Id: X-Mailer: git-send-email 2.39.2.101.g768bb238c484.dirty In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231205_165214_822845_171D11E0 X-CRM114-Status: GOOD ( 11.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a binding for implementations of the Arm CoreSight Performance Monitoring Unit Architecture. Not to be confused with CoreSight debug and trace, the PMU architecture defines a standard MMIO interface for event counters similar to the CPU PMU architecture, where the implementation and most of its features are discoverable through ID registers. CC: Rob Herring CC: Krzysztof Kozlowski CC: Conor Dooley Signed-off-by: Robin Murphy --- .../bindings/perf/arm,coresight-pmu.yaml | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml new file mode 100644 index 000000000000..12c7b28eee35 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/arm,coresight-pmu.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/arm,coresight-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm Coresight Performance Monitoring Unit Architecture + +maintainers: + - Robin Murphy + +properties: + compatible: + const: arm,coresight-pmu + + reg: + items: + - description: Register page 0 + - description: Register page 1 (if dual-page extension implemented) + minItems: 1 + + interrupts: + items: + - description: Overflow interrupt + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + description: List of CPUs with which the PMU is associated, if applicable + + arm,64-bit-atomic: + type: boolean + description: Register accesses are single-copy atomic at doubleword granularity + +required: + - compatible + - reg + +additionalProperties: false