| Message ID | ccdbbfb2833d274b6bfa234aada57e68d9793dd5.1526487615.git.vilhelm.gray@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
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On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray <vilhelm.gray@gmail.com> wrote: > From: Benjamin Gaignard <benjamin.gaignard@st.com> v6? Where's v1-v5? > Add bindings for STM32 Timer quadrature encoder. > It is a sub-node of STM32 Timer which implement the > counter part of the hardware. > > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> > Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> > --- > .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ > .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ > 2 files changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > > diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > new file mode 100644 > index 000000000000..377728128bef > --- /dev/null > +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > @@ -0,0 +1,26 @@ > +STMicroelectronics STM32 Timer quadrature encoder > + > +STM32 Timer provides quadrature encoder counter mode to detect 'mode' does not sound like a sub-block of the timers block. > +angular position and direction of rotary elements, > +from IN1 and IN2 input signals. > + > +Must be a sub-node of an STM32 Timer device tree node. > +See ../mfd/stm32-timers.txt for details about the parent node. > + > +Required properties: > +- compatible: Must be "st,stm32-timer-counter". > +- pinctrl-names: Set to "default". > +- pinctrl-0: List of phandles pointing to pin configuration nodes, > + to set IN1/IN2 pins in mode of operation for Low-Power > + Timer input on external pin. > + > +Example: > + timers@40010000 { > + compatible = "st,stm32-timers"; > + ... > + counter { > + compatible = "st,stm32-timer-counter"; Is there only 1? How is the counter addressed? > + pinctrl-names = "default"; > + pinctrl-0 = <&tim1_in_pins>; > + }; > + };
On Thu, May 17, 2018 at 11:23:22AM -0500, Rob Herring wrote: >On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray ><vilhelm.gray@gmail.com> wrote: >> From: Benjamin Gaignard <benjamin.gaignard@st.com> > >v6? Where's v1-v5? Hi Rob, I apologize, I should have CC you on the rest of the patchset to give you a better idea of the context of this particular patch. Benjamin Gaignard authored this particular patch, so I'll leave it up to him to respond to your inline comments, but I can at least provide a brief history of the revisions of this patchset as a whole. This patchset introduces a "Generic Counter" interface for drivers to support various counter devices (tally counters, rotary encoders, etc.). The v1 revision was submitted on 31 July 2017 (https://lkml.org/lkml/2017/7/31/514) as a wrapper over existing IIO functionality. This implementation design was unsuitable for the needs of Generic Counter API, so the v4 revision submitted on 14 December 2017 reimplemented the Generic Counter API as its own Counter subsystem (https://lkml.org/lkml/2017/12/14/778). The v5 revision was submitted on 9 March 2018 (https://lkml.org/lkml/2018/3/9/728) and introduced the STM32 Timer quadrature encoder driver with Generic Counter interface support. I should have CC you in that revision to comment on the dt-bindings patch, but I overlooked it, so I made sure to CC you on this v6 revision. William Breathitt Gray > >> Add bindings for STM32 Timer quadrature encoder. >> It is a sub-node of STM32 Timer which implement the >> counter part of the hardware. >> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> >> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> >> --- >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ >> 2 files changed, 33 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> new file mode 100644 >> index 000000000000..377728128bef >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> @@ -0,0 +1,26 @@ >> +STMicroelectronics STM32 Timer quadrature encoder >> + >> +STM32 Timer provides quadrature encoder counter mode to detect > >'mode' does not sound like a sub-block of the timers block. > >> +angular position and direction of rotary elements, >> +from IN1 and IN2 input signals. >> + >> +Must be a sub-node of an STM32 Timer device tree node. >> +See ../mfd/stm32-timers.txt for details about the parent node. >> + >> +Required properties: >> +- compatible: Must be "st,stm32-timer-counter". >> +- pinctrl-names: Set to "default". >> +- pinctrl-0: List of phandles pointing to pin configuration nodes, >> + to set IN1/IN2 pins in mode of operation for Low-Power >> + Timer input on external pin. >> + >> +Example: >> + timers@40010000 { >> + compatible = "st,stm32-timers"; >> + ... >> + counter { >> + compatible = "st,stm32-timer-counter"; > >Is there only 1? How is the counter addressed? > >> + pinctrl-names = "default"; >> + pinctrl-0 = <&tim1_in_pins>; >> + }; >> + };
2018-05-17 18:23 GMT+02:00 Rob Herring <robh+dt@kernel.org>: > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray > <vilhelm.gray@gmail.com> wrote: >> From: Benjamin Gaignard <benjamin.gaignard@st.com> > > v6? Where's v1-v5? > >> Add bindings for STM32 Timer quadrature encoder. >> It is a sub-node of STM32 Timer which implement the >> counter part of the hardware. >> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Mark Rutland <mark.rutland@arm.com> >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> >> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> >> --- >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ >> 2 files changed, 33 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> new file mode 100644 >> index 000000000000..377728128bef >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> @@ -0,0 +1,26 @@ >> +STMicroelectronics STM32 Timer quadrature encoder >> + >> +STM32 Timer provides quadrature encoder counter mode to detect > > 'mode' does not sound like a sub-block of the timers block. quadrature encoding is one of the counting modes of this hardware block which is enable to count on other signals/triggers > >> +angular position and direction of rotary elements, >> +from IN1 and IN2 input signals. >> + >> +Must be a sub-node of an STM32 Timer device tree node. >> +See ../mfd/stm32-timers.txt for details about the parent node. >> + >> +Required properties: >> +- compatible: Must be "st,stm32-timer-counter". >> +- pinctrl-names: Set to "default". >> +- pinctrl-0: List of phandles pointing to pin configuration nodes, >> + to set IN1/IN2 pins in mode of operation for Low-Power >> + Timer input on external pin. >> + >> +Example: >> + timers@40010000 { >> + compatible = "st,stm32-timers"; >> + ... >> + counter { >> + compatible = "st,stm32-timer-counter"; > > Is there only 1? How is the counter addressed? Yes there is only one counter per hardware block. Counter is addressed like the two others sub-nodes and the details about parent mode are describe in stm32-timers.txt Should I add them here too ? so example will be like that: timers@40010000 { #address-cells = <1>; #size-cells = <0>; compatible = "st,stm32-timers"; reg = <0x40010000 0x400>; clocks = <&rcc 0 160>; clock-names = "int"; counter { compatible = "st,stm32-timer-counter"; pinctrl-names = "default"; pinctrl-0 = <&tim1_in_pins>; }; }; Benjamin > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: > 2018-05-17 18:23 GMT+02:00 Rob Herring <robh+dt@kernel.org>: > > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray > > <vilhelm.gray@gmail.com> wrote: > >> From: Benjamin Gaignard <benjamin.gaignard@st.com> > > > > v6? Where's v1-v5? > > > >> Add bindings for STM32 Timer quadrature encoder. > >> It is a sub-node of STM32 Timer which implement the > >> counter part of the hardware. > >> > >> Cc: Rob Herring <robh+dt@kernel.org> > >> Cc: Mark Rutland <mark.rutland@arm.com> > >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> > >> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> > >> --- > >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ > >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ > >> 2 files changed, 33 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > >> > >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > >> new file mode 100644 > >> index 000000000000..377728128bef > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > >> @@ -0,0 +1,26 @@ > >> +STMicroelectronics STM32 Timer quadrature encoder > >> + > >> +STM32 Timer provides quadrature encoder counter mode to detect > > > > 'mode' does not sound like a sub-block of the timers block. > > quadrature encoding is one of the counting modes of this hardware > block which is enable to count on other signals/triggers You don't need a child node and compatible to set a mode. > >> +angular position and direction of rotary elements, > >> +from IN1 and IN2 input signals. > >> + > >> +Must be a sub-node of an STM32 Timer device tree node. > >> +See ../mfd/stm32-timers.txt for details about the parent node. > >> + > >> +Required properties: > >> +- compatible: Must be "st,stm32-timer-counter". > >> +- pinctrl-names: Set to "default". > >> +- pinctrl-0: List of phandles pointing to pin configuration nodes, > >> + to set IN1/IN2 pins in mode of operation for Low-Power > >> + Timer input on external pin. > >> + > >> +Example: > >> + timers@40010000 { > >> + compatible = "st,stm32-timers"; > >> + ... > >> + counter { > >> + compatible = "st,stm32-timer-counter"; > > > > Is there only 1? How is the counter addressed? > > Yes there is only one counter per hardware block. > Counter is addressed like the two others sub-nodes and the details > about parent mode are describe in stm32-timers.txt > Should I add them here too ? so example will be like that: No, you should drop the child node and add pinctrl to the parent. Any other functions this block has that you plan on adding? Please make bindings as complete as possible, not what you currently have drivers for. > timers@40010000 { > #address-cells = <1>; > #size-cells = <0>; > compatible = "st,stm32-timers"; > reg = <0x40010000 0x400>; > clocks = <&rcc 0 160>; > clock-names = "int"; > counter { > compatible = "st,stm32-timer-counter"; > pinctrl-names = "default"; > pinctrl-0 = <&tim1_in_pins>; > }; > }; > > Benjamin > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Fri, 18 May 2018 11:28:15 -0500 Rob Herring <robh@kernel.org> wrote: > On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: > > 2018-05-17 18:23 GMT+02:00 Rob Herring <robh+dt@kernel.org>: > > > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray > > > <vilhelm.gray@gmail.com> wrote: > > >> From: Benjamin Gaignard <benjamin.gaignard@st.com> > > > > > > v6? Where's v1-v5? > > > > > >> Add bindings for STM32 Timer quadrature encoder. > > >> It is a sub-node of STM32 Timer which implement the > > >> counter part of the hardware. > > >> > > >> Cc: Rob Herring <robh+dt@kernel.org> > > >> Cc: Mark Rutland <mark.rutland@arm.com> > > >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> > > >> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> > > >> --- > > >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ > > >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ > > >> 2 files changed, 33 insertions(+) > > >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > > >> > > >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > > >> new file mode 100644 > > >> index 000000000000..377728128bef > > >> --- /dev/null > > >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt > > >> @@ -0,0 +1,26 @@ > > >> +STMicroelectronics STM32 Timer quadrature encoder > > >> + > > >> +STM32 Timer provides quadrature encoder counter mode to detect > > > > > > 'mode' does not sound like a sub-block of the timers block. > > > > quadrature encoding is one of the counting modes of this hardware > > block which is enable to count on other signals/triggers > > You don't need a child node and compatible to set a mode. A pile of extra hardware becomes relevant and you only want to be in this state if you have appropriate external device wired up. In this case there is admittedly not a lot here but some devices will look a bit more like a touchscreen controller. They are often build on top of an ADC module, but have a load of touch screen only signals and electrical elements that warrant being represented as a separate node in the DT. > > > >> +angular position and direction of rotary elements, > > >> +from IN1 and IN2 input signals. > > >> + > > >> +Must be a sub-node of an STM32 Timer device tree node. > > >> +See ../mfd/stm32-timers.txt for details about the parent node. > > >> + > > >> +Required properties: > > >> +- compatible: Must be "st,stm32-timer-counter". > > >> +- pinctrl-names: Set to "default". > > >> +- pinctrl-0: List of phandles pointing to pin configuration nodes, > > >> + to set IN1/IN2 pins in mode of operation for Low-Power > > >> + Timer input on external pin. > > >> + > > >> +Example: > > >> + timers@40010000 { > > >> + compatible = "st,stm32-timers"; > > >> + ... > > >> + counter { > > >> + compatible = "st,stm32-timer-counter"; > > > > > > Is there only 1? How is the counter addressed? > > > > Yes there is only one counter per hardware block. > > Counter is addressed like the two others sub-nodes and the details > > about parent mode are describe in stm32-timers.txt > > Should I add them here too ? so example will be like that: > > No, you should drop the child node and add pinctrl to the parent. > > Any other functions this block has that you plan on adding? Please make > bindings as complete as possible, not what you currently have drivers > for. > > > timers@40010000 { > > #address-cells = <1>; > > #size-cells = <0>; > > compatible = "st,stm32-timers"; > > reg = <0x40010000 0x400>; > > clocks = <&rcc 0 160>; > > clock-names = "int"; > > counter { > > compatible = "st,stm32-timer-counter"; > > pinctrl-names = "default"; > > pinctrl-0 = <&tim1_in_pins>; > > }; > > }; > > > > Benjamin > > > > > > _______________________________________________ > > > linux-arm-kernel mailing list > > > linux-arm-kernel@lists.infradead.org > > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2018-05-18 18:28 GMT+02:00 Rob Herring <robh@kernel.org>: > On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: >> 2018-05-17 18:23 GMT+02:00 Rob Herring <robh+dt@kernel.org>: >> > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray >> > <vilhelm.gray@gmail.com> wrote: >> >> From: Benjamin Gaignard <benjamin.gaignard@st.com> >> > >> > v6? Where's v1-v5? >> > >> >> Add bindings for STM32 Timer quadrature encoder. >> >> It is a sub-node of STM32 Timer which implement the >> >> counter part of the hardware. >> >> >> >> Cc: Rob Herring <robh+dt@kernel.org> >> >> Cc: Mark Rutland <mark.rutland@arm.com> >> >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> >> >> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> >> >> --- >> >> .../bindings/counter/stm32-timer-cnt.txt | 26 +++++++++++++++++++ >> >> .../devicetree/bindings/mfd/stm32-timers.txt | 7 +++++ >> >> 2 files changed, 33 insertions(+) >> >> create mode 100644 Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> >> >> diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> new file mode 100644 >> >> index 000000000000..377728128bef >> >> --- /dev/null >> >> +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt >> >> @@ -0,0 +1,26 @@ >> >> +STMicroelectronics STM32 Timer quadrature encoder >> >> + >> >> +STM32 Timer provides quadrature encoder counter mode to detect >> > >> > 'mode' does not sound like a sub-block of the timers block. >> >> quadrature encoding is one of the counting modes of this hardware >> block which is enable to count on other signals/triggers > > You don't need a child node and compatible to set a mode. "mode" isn't the good word here because quadratic encoder enable a sub-block of this hardware. Timer internal counter input could be internal or external clocks, some IIO triggers or the output of the quadratic encoder sub-block. It is a child like pwm or IIO trigger. > >> >> +angular position and direction of rotary elements, >> >> +from IN1 and IN2 input signals. >> >> + >> >> +Must be a sub-node of an STM32 Timer device tree node. >> >> +See ../mfd/stm32-timers.txt for details about the parent node. >> >> + >> >> +Required properties: >> >> +- compatible: Must be "st,stm32-timer-counter". >> >> +- pinctrl-names: Set to "default". >> >> +- pinctrl-0: List of phandles pointing to pin configuration nodes, >> >> + to set IN1/IN2 pins in mode of operation for Low-Power >> >> + Timer input on external pin. >> >> + >> >> +Example: >> >> + timers@40010000 { >> >> + compatible = "st,stm32-timers"; >> >> + ... >> >> + counter { >> >> + compatible = "st,stm32-timer-counter"; >> > >> > Is there only 1? How is the counter addressed? >> >> Yes there is only one counter per hardware block. >> Counter is addressed like the two others sub-nodes and the details >> about parent mode are describe in stm32-timers.txt >> Should I add them here too ? so example will be like that: > > No, you should drop the child node and add pinctrl to the parent. > > Any other functions this block has that you plan on adding? Please make > bindings as complete as possible, not what you currently have drivers > for. Counter framework didn't exist when I pushed timer node but thanks to William's effort it will allow us to use this kindf of hardware Benjamin > >> timers@40010000 { >> #address-cells = <1>; >> #size-cells = <0>; >> compatible = "st,stm32-timers"; >> reg = <0x40010000 0x400>; >> clocks = <&rcc 0 160>; >> clock-names = "int"; >> counter { >> compatible = "st,stm32-timer-counter"; >> pinctrl-names = "default"; >> pinctrl-0 = <&tim1_in_pins>; >> }; >> }; >> >> Benjamin >> > >> > _______________________________________________ >> > linux-arm-kernel mailing list >> > linux-arm-kernel@lists.infradead.org >> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt new file mode 100644 index 000000000000..377728128bef --- /dev/null +++ b/Documentation/devicetree/bindings/counter/stm32-timer-cnt.txt @@ -0,0 +1,26 @@ +STMicroelectronics STM32 Timer quadrature encoder + +STM32 Timer provides quadrature encoder counter mode to detect +angular position and direction of rotary elements, +from IN1 and IN2 input signals. + +Must be a sub-node of an STM32 Timer device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required properties: +- compatible: Must be "st,stm32-timer-counter". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes, + to set IN1/IN2 pins in mode of operation for Low-Power + Timer input on external pin. + +Example: + timers@40010000 { + compatible = "st,stm32-timers"; + ... + counter { + compatible = "st,stm32-timer-counter"; + pinctrl-names = "default"; + pinctrl-0 = <&tim1_in_pins>; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt index 1db6e0057a63..ff9c14ada30b 100644 --- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt @@ -23,6 +23,7 @@ Optional parameters: Optional subnodes: - pwm: See ../pwm/pwm-stm32.txt - timer: See ../iio/timer/stm32-timer-trigger.txt +- counter: See ../counter/stm32-timer-cnt.txt Example: timers@40010000 { @@ -43,4 +44,10 @@ Example: compatible = "st,stm32-timer-trigger"; reg = <0>; }; + + counter { + compatible = "st,stm32-timer-counter"; + pinctrl-names = "default"; + pinctrl-0 = <&tim1_in_pins>; + }; };