diff mbox series

[2/3] ARM: dts: BCM5301X: Linksys EA9500 add port 5 and port 7

Message ID cd64e0ccae3e5785c80ad4d73af533a40fc15876.1601655904.git.npcomplete13@gmail.com (mailing list archive)
State Superseded, archived
Headers show
Series ARM: dts: BCM5301X: Linksys EA9500 device tree changes | expand

Commit Message

Vivek Unune Oct. 7, 2020, 7:01 p.m. UTC
Add port 5 and port 7 which are connected to gmac0 & 1 respectively
DSA driver will use port 5 as cpu port and this works as well.

Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
---
 .../boot/dts/bcm47094-linksys-panamera.dts    | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Andrew Lunn Oct. 7, 2020, 9:03 p.m. UTC | #1
On Wed, Oct 07, 2020 at 03:01:51PM -0400, Vivek Unune wrote:
> Add port 5 and port 7 which are connected to gmac0 & 1 respectively
> DSA driver will use port 5 as cpu port and this works as well.

What port was used before this was added? The CPU port cannot be
changed because it can break user space, the code which is configuring
the master interface up.

    Andrew
Vivek Unune Oct. 7, 2020, 10:07 p.m. UTC | #2
On Wed, Oct 07, 2020 at 11:03:27PM +0200, Andrew Lunn wrote:
> On Wed, Oct 07, 2020 at 03:01:51PM -0400, Vivek Unune wrote:
> > Add port 5 and port 7 which are connected to gmac0 & 1 respectively
> > DSA driver will use port 5 as cpu port and this works as well.
> 
> What port was used before this was added? The CPU port cannot be
> changed because it can break user space, the code which is configuring
> the master interface up.

Hi Andrew,

Port 8 was used before this. Factory firmware uses all three - 5, 7, 8 
I'm aware that current implementation of DSA driver does support
multiple CPU ports and uses the first one that is detected. DSA works
for either of the CPU ports.

In case of the non-DSA switch driver, which is enabled by default in
OpenWrt. Port 8 configuration will not work, since the non-DSA driver
uses first gmac core i.e. eth0. But since gmac0 isn't connected to
port 5, it doesn't work.

This router is currently not enabled in Openwrt and it doesn't
generate a firmware for public consumtion. So I'm sure this won't
affect anyone. Albeit, I've been generating custom firmware [1] for
this so I can get feedback on these changes I'm submitting.

With this patch series, I plan to enable firmware for this router
and free me up myself from building custom images. Moreover, the
router will start getting regular updates.

Thanks,

Vivek

[1] https://forum.openwrt.org/t/build-for-linksys-ea9500/1817
Andrew Lunn Oct. 8, 2020, 12:32 a.m. UTC | #3
> This router is currently not enabled in Openwrt

You have to be careful here. Not everything runs OpenWRT. You cannot
break backwards compatibility in mainline, simple as that. You need to
ensure that mainline does not see a change in the CPU port.

    Andrew
Florian Fainelli Oct. 8, 2020, 2:58 p.m. UTC | #4
On 10/7/2020 5:32 PM, Andrew Lunn wrote:
>> This router is currently not enabled in Openwrt
> 
> You have to be careful here. Not everything runs OpenWRT. You cannot
> break backwards compatibility in mainline, simple as that. You need to
> ensure that mainline does not see a change in the CPU port.

I don't think this is breaking anything, in premise all 3 CPU interfaces 
are completely interchangeable, with the notable fact that port 8 
happens to have the flow accelerator block available for re-circulation 
of packets if we wanted to support a NATP offload at some point in the 
future.

Vivek, maybe you can add ports 5 and 7 in the Device Tree and mark them 
as disabled for now.
Vivek Unune Oct. 8, 2020, 8:20 p.m. UTC | #5
Thanks Florian, I'll do that!

On Thu, Oct 8, 2020 at 10:58 AM Florian Fainelli <f.fainelli@gmail.com> wrote:
>
>
>
> On 10/7/2020 5:32 PM, Andrew Lunn wrote:
> >> This router is currently not enabled in Openwrt
> >
> > You have to be careful here. Not everything runs OpenWRT. You cannot
> > break backwards compatibility in mainline, simple as that. You need to
> > ensure that mainline does not see a change in the CPU port.
>
> I don't think this is breaking anything, in premise all 3 CPU interfaces
> are completely interchangeable, with the notable fact that port 8
> happens to have the flow accelerator block available for re-circulation
> of packets if we wanted to support a NATP offload at some point in the
> future.
>
> Vivek, maybe you can add ports 5 and 7 in the Device Tree and mark them
> as disabled for now.
> --
> Florian
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
index f8443d9f86b7..b36ed0ead733 100644
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -161,6 +161,28 @@  port@4 {
 			label = "wan";
 		};
 
+		port@5 {
+			reg = <5>;
+			ethernet = <&gmac0>;
+			label = "cpu";
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
+		port@7 {
+			reg = <7>;
+			ethernet = <&gmac1>;
+			label = "cpu";
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
 		port@8 {
 			reg = <8>;
 			ethernet = <&gmac2>;