From patchwork Thu Oct 23 23:10:58 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geoff Levand X-Patchwork-Id: 5143681 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 16F76C11AC for ; Thu, 23 Oct 2014 23:39:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0333820256 for ; Thu, 23 Oct 2014 23:39:06 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EB5D020253 for ; Thu, 23 Oct 2014 23:39:04 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XhRYH-00045Y-MO; Thu, 23 Oct 2014 23:12:17 +0000 Received: from merlin.infradead.org ([2001:4978:20e::2]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XhRXC-0003i0-AA; Thu, 23 Oct 2014 23:11:10 +0000 Received: from geoff by merlin.infradead.org with local (Exim 4.80.1 #2 (Red Hat Linux)) id 1XhRX0-0002mX-JE; Thu, 23 Oct 2014 23:10:58 +0000 Message-Id: In-Reply-To: References: From: Geoff Levand Patch-Date: Thu, 23 Oct 2014 13:58:39 -0700 Subject: [PATCH 04/10] arm64: Add EL2 switch to soft_restart To: Catalin Marinas , Will Deacon Date: Thu, 23 Oct 2014 23:10:58 +0000 Cc: marc.zyngier@arm.com, Grant Likely , kexec@lists.infradead.org, linux-arm-kernel@lists.infradead.org, christoffer.dall@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When a CPU is reset it needs to be put into the exception level it had when it entered the kernel. Update cpu_reset() to accept an argument el2_switch which signals cpu_reset() to enter the soft reset address at EL2. If el2_switch is not set the soft reset address will be entered at EL1. Update cpu_soft_restart() and soft_restart() to pass the return of is_hyp_mode_available() as the el2_switch value to cpu_reset(). Also update the comments of cpu_reset(), cpu_soft_restart() and soft_restart() to reflect this change. Signed-off-by: Geoff Levand --- arch/arm64/include/asm/proc-fns.h | 4 ++-- arch/arm64/kernel/process.c | 6 ++++- arch/arm64/mm/proc.S | 47 +++++++++++++++++++++++++++++---------- 3 files changed, 42 insertions(+), 15 deletions(-) diff --git a/arch/arm64/include/asm/proc-fns.h b/arch/arm64/include/asm/proc-fns.h index 9a8fd84..339394d 100644 --- a/arch/arm64/include/asm/proc-fns.h +++ b/arch/arm64/include/asm/proc-fns.h @@ -32,8 +32,8 @@ extern void cpu_cache_off(void); extern void cpu_do_idle(void); extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); -void cpu_soft_restart(phys_addr_t cpu_reset, - unsigned long addr) __attribute__((noreturn)); +void cpu_soft_restart(phys_addr_t cpu_reset, unsigned long el2_switch, + unsigned long addr) __attribute__((noreturn)); extern void cpu_do_suspend(struct cpu_suspend_ctx *ptr); extern u64 cpu_do_resume(phys_addr_t ptr, u64 idmap_ttbr); diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index bf66922..0a3414b 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -50,6 +50,7 @@ #include #include #include +#include #ifdef CONFIG_CC_STACKPROTECTOR #include @@ -60,7 +61,10 @@ EXPORT_SYMBOL(__stack_chk_guard); void soft_restart(unsigned long addr) { setup_mm_for_reboot(); - cpu_soft_restart(virt_to_phys(cpu_reset), addr); + + cpu_soft_restart(virt_to_phys(cpu_reset), is_hyp_mode_available(), + addr); + /* Should never get here */ BUG(); } diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 4e778b1..7467199 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -25,6 +25,7 @@ #include #include #include +#include #include "proc-macros.S" @@ -59,27 +60,48 @@ ENTRY(cpu_cache_off) ENDPROC(cpu_cache_off) /* - * cpu_reset(loc) + * cpu_reset(el2_switch, loc) - Helper for cpu_soft_restart. * - * Perform a soft reset of the system. Put the CPU into the same state - * as it would be if it had been reset, and branch to what would be the - * reset vector. It must be executed with the flat identity mapping. + * @cpu_reset: Physical address of the cpu_reset routine. + * @el2_switch: Flag to indicate a swich to EL2 is needed. + * @addr: Location to jump to for soft reset. * - * - loc - location to jump to for soft reset + * Put the CPU into the same state as it would be if it had been reset, and + * branch to what would be the reset vector. It must be executed with the + * flat identity mapping. */ + .align 5 + ENTRY(cpu_reset) - mrs x1, sctlr_el1 - bic x1, x1, #1 - msr sctlr_el1, x1 // disable the MMU + mrs x2, sctlr_el1 + bic x2, x2, #1 + msr sctlr_el1, x2 // disable the MMU isb - ret x0 + + cbz x0, 1f // el2_switch? + mov x0, x1 + mov x1, xzr + mov x2, xzr + mov x3, xzr + hvc #HVC_CALL_FUNC // no return + +1: ret x1 ENDPROC(cpu_reset) +/* + * cpu_soft_restart(cpu_reset, el2_switch, addr) - Perform a cpu soft reset. + * + * @cpu_reset: Physical address of the cpu_reset routine. + * @el2_switch: Flag to indicate a swich to EL2 is needed, passed to cpu_reset. + * @addr: Location to jump to for soft reset, passed to cpu_reset. + * + */ + ENTRY(cpu_soft_restart) - /* Save address of cpu_reset() and reset address */ - mov x19, x0 - mov x20, x1 + mov x19, x0 // cpu_reset + mov x20, x1 // el2_switch + mov x21, x2 // addr /* Turn D-cache off */ bl cpu_cache_off @@ -88,6 +110,7 @@ ENTRY(cpu_soft_restart) bl flush_cache_all mov x0, x20 + mov x1, x21 ret x19 ENDPROC(cpu_soft_restart)