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This patch registers one Spreadtrum AON timer as persistent timer, which runs at 32bit and periodic mode. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/timer-sprd.c | 80 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 81 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 8e8a097..d7dddcc 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -453,6 +453,7 @@ config SPRD_TIMER bool "Spreadtrum timer driver" if COMPILE_TEST depends on HAS_IOMEM select TIMER_OF + select PERSISTENT_CLOCK help Enables support for the Spreadtrum timer driver. diff --git a/drivers/clocksource/timer-sprd.c b/drivers/clocksource/timer-sprd.c index ef9ebea..c6f657a 100644 --- a/drivers/clocksource/timer-sprd.c +++ b/drivers/clocksource/timer-sprd.c @@ -3,8 +3,11 @@ * Copyright (C) 2017 Spreadtrum Communications Inc. */ +#include #include #include +#include +#include #include "timer-of.h" @@ -157,3 +160,80 @@ static int __init sprd_timer_init(struct device_node *np) } TIMER_OF_DECLARE(sc9860_timer, "sprd,sc9860-timer", sprd_timer_init); + +void __iomem *pbase; + +static u64 sprd_persistent_timer_read(void) +{ + return ~(u64)readl_relaxed(pbase + TIMER_VALUE_SHDW_LO) & + CLOCKSOURCE_MASK(32); +} + +static void sprd_persistent_timer_disable(void) +{ + sprd_timer_disable(pbase); +} + +static void sprd_persistent_timer_enable(void) +{ + sprd_timer_disable(pbase); + sprd_timer_update_counter(pbase, TIMER_VALUE_LO_MASK); + sprd_timer_enable(pbase, TIMER_CTL_PERIOD_MODE); +} + +static int __init sprd_persistent_timer_init(struct device_node *np) +{ + struct clk *clk; + u32 freq; + int ret; + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("Can't get timer clock for %pOF\n", np); + return PTR_ERR(clk); + } + + ret = clk_prepare_enable(clk); + if (ret) { + pr_err("Failed to enable clock for %pOF\n", np); + clk_put(clk); + return ret; + } + + freq = clk_get_rate(clk); + if (!freq) { + pr_err("Failed to get clock rate for %pOF\n", np); + ret = -EINVAL; + goto clk_rate_err; + } + + pbase = of_io_request_and_map(np, 0, of_node_full_name(np)); + if (IS_ERR(pbase)) { + pr_err("Can't map timer registers for %pOF\n", np); + ret = PTR_ERR(pbase); + goto clk_rate_err; + } + + sprd_persistent_timer_enable(); + + ret = persistent_clock_init_and_register(sprd_persistent_timer_read, + CLOCKSOURCE_MASK(32), freq, 0); + if (ret) { + pr_err("Failed to register persistent clock for %pOF\n", np); + goto persist_err; + } + + return 0; + +persist_err: + sprd_persistent_timer_disable(); + iounmap(pbase); +clk_rate_err: + clk_disable_unprepare(clk); + clk_put(clk); + + return ret; +} + +TIMER_OF_DECLARE(sc9860_persistent_timer, "sprd,sc9860-persistent-timer", + sprd_persistent_timer_init);