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b=FAutgiN3oYranUKBv4VExJFxRN8BBLAR79obrbezRFM5uMH68s82Q3z57bXzqQ4dQB Jjfyy5OFBunC3va1Jlx+fjB28Bs81Rj0d6f59fEYNuf8VzLgsWqNuMvfeWBIw5u8o+da QfBXZYjtoC37M7q/+cI333SDblvFsLl6uKADApkT6oQDxzNlqdWTn3KAWM3Xv+60hYDQ ElAAVcbtVIuXya2XG6/FsWJHGQnbKsVdndpPaKc7+gn3JCNfrWcPSKvX+iz3bpDOhJK9 Iv+rGT91y9aS8IlAxcp6znDP/aw7CpGGZclHL2qI0iNM9E96+f1h3+DI582Ha1MXNX6L pZ4A== X-Gm-Message-State: ALKqPwcQ8wsr8dwVlCgUJrP3Zgiyf4YzE36glcI0u0DA526VIJHnenlA T9H+jO5fe2Su+hydFZDbKrBe6Q== X-Google-Smtp-Source: AB8JxZqTzDJxZU1iLd/5GPmoG3xaW+mzwh/xFcXVxmlzDXYhKB4gcec77GSSokf0q8XdaFQQ4q1OsQ== X-Received: by 2002:a17:902:76c3:: with SMTP id j3-v6mr5763144plt.15.1526288193314; Mon, 14 May 2018 01:56:33 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id x71-v6sm23308158pfe.47.2018.05.14.01.56.25 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 May 2018 01:56:32 -0700 (PDT) From: Baolin Wang To: tglx@linutronix.de, john.stultz@linaro.org, daniel.lezcano@linaro.org, arnd@arndb.de, tony@atomide.com, aaro.koskinen@iki.fi, linux@armlinux.org.uk, mark.rutland@arm.com, marc.zyngier@arm.com Subject: [RFC PATCH 03/10] arm: omap: Convert 32K counter to use persistent clock Date: Mon, 14 May 2018 16:55:29 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180514_015644_429602_0CEB90E9 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: kstewart@linuxfoundation.org, alexandre.belloni@bootlin.com, heiko@sntech.de, peterz@infradead.org, viresh.kumar@linaro.org, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, hpa@zytor.com, mingo@kernel.org, x86@kernel.org, jonathanh@nvidia.com, paulmck@linux.vnet.ibm.com, len.brown@intel.com, mlichvar@redhat.com, broonie@kernel.org, linux-tegra@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, douly.fnst@cn.fujitsu.com, baolin.wang@linaro.org, gregkh@linuxfoundation.org, rdunlap@infradead.org, rajvi.jingar@intel.com, pombredanne@nexb.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP We have introduced the persistent clock framework to support the OS time compensating from persistent clock, so this patch converts the 32k counter to use persistent clock framework to save lots of duplicate code. Signed-off-by: Baolin Wang --- arch/arm/plat-omap/Kconfig | 1 + arch/arm/plat-omap/counter_32k.c | 44 ++++++-------------------------------- 2 files changed, 8 insertions(+), 37 deletions(-) diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index afc1a1d..0e4e385 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 config ARCH_OMAP + select PERSISTENT_CLOCK bool if ARCH_OMAP diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index 2438b96..5d52f7c 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -19,8 +19,7 @@ #include #include #include - -#include +#include #include @@ -44,33 +43,6 @@ static u64 notrace omap_32k_read_sched_clock(void) } /** - * omap_read_persistent_clock64 - Return time from a persistent clock. - * - * Reads the time from a source which isn't disabled during PM, the - * 32k sync timer. Convert the cycles elapsed since last read into - * nsecs and adds to a monotonically increasing timespec64. - */ -static struct timespec64 persistent_ts; -static cycles_t cycles; -static unsigned int persistent_mult, persistent_shift; - -static void omap_read_persistent_clock64(struct timespec64 *ts) -{ - unsigned long long nsecs; - cycles_t last_cycles; - - last_cycles = cycles; - cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; - - nsecs = clocksource_cyc2ns(cycles - last_cycles, - persistent_mult, persistent_shift); - - timespec64_add_ns(&persistent_ts, nsecs); - - *ts = persistent_ts; -} - -/** * omap_init_clocksource_32k - setup and register counter 32k as a * kernel clocksource * @pbase: base addr of counter_32k module @@ -95,13 +67,6 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) else sync32k_cnt_reg = vbase + OMAP2_32KSYNCNT_CR_OFF_LOW; - /* - * 120000 rough estimate from the calculations in - * __clocksource_update_freq_scale. - */ - clocks_calc_mult_shift(&persistent_mult, &persistent_shift, - 32768, NSEC_PER_SEC, 120000); - ret = clocksource_mmio_init(sync32k_cnt_reg, "32k_counter", 32768, 250, 32, clocksource_mmio_readl_up); if (ret) { @@ -110,7 +75,12 @@ int __init omap_init_clocksource_32k(void __iomem *vbase) } sched_clock_register(omap_32k_read_sched_clock, 32, 32768); - register_persistent_clock(NULL, omap_read_persistent_clock64); + /* + * 120000 rough estimate from the calculations in + * __clocksource_update_freq_scale. + */ + persistent_clock_init_and_register(omap_32k_read_sched_clock, + CLOCKSOURCE_MASK(32), 32768, 120000); pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n"); return 0;