From patchwork Mon Feb 7 09:30:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Baruch Siach X-Patchwork-Id: 12737084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABA21C433FE for ; Mon, 7 Feb 2022 09:32:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wEVG02Q6wBxoCJri0tG5AedIMqqZAkFZJGG4RPkEfMs=; b=dOhlffPvio1ulw HgIYvAv8yLsY3N2GCKan75MI+QtPyaQ3BprsWueXiGmyvGFPWPssmUt1Ja1uYVpfBDdo6kK0iRHKq W1I4sIEQW2VWov++oEheim1588ccFjX+CeHws5KmyHbuptbyl904O//eIJmxYz1sP21IApjBiCEq1 A1By21m2+F3edlE1O2VoERfF4B+5qCV2XL/E6kYU/h5mx/CsTq3VqLIDj6b+Tb/Zwjnq4MEeMCG85 VwRjJ9UegoMdf+FXlC8vFCaIuSwKSTE7TzWItSsmh/Csd3hT/0sVOJ8qL0G1fNNRrQn4F+OvI3f1z qWddvm/kkaC3lqOgzC3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nH0Ms-009ZLR-By; Mon, 07 Feb 2022 09:31:30 +0000 Received: from guitar.tcltek.co.il ([84.110.109.230] helo=mx.tkos.co.il) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nH0MT-009ZEe-I6 for linux-arm-kernel@lists.infradead.org; Mon, 07 Feb 2022 09:31:09 +0000 Received: from tarshish.tkos.co.il (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id 9C64B440883; Mon, 7 Feb 2022 11:30:37 +0200 (IST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=tkos.co.il; s=default; t=1644226238; bh=LG1R2ibEhTcQ8x9dNJ4eYSWnaeIYekcQQHT0CEdyRZU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gI0ya3JNUqByCXZ+cvm21SUnGCYkfFvaPSmUiazlGd13B1OxQdxdjhUUuG8x84MjL qpTQEWb2uC2wldRSn1FJjfogqxGN+PTeX4kCnQ8PByMjoUDaShJzQX/ysq7SxdCg9F nvEPaDj8naW1uR493Q5CJR0j/L1JOl5Jq+kNx8EXQIA43URdZykPYJiAItYTdxEkEk 6L4VztofVcv1qpNbRqwoq1OOFonbsrChgTHITM6zoSWw21wDgRsmBK7qSxOhV5kU4n Pm5NWNBaPOi8pCfDR73/PkvdXEojOyBrtCR6Tut2gh0ZRS0/rhUXsyJNyqNnfjz+AM ZkEOHF8fRTIRw== From: Baruch Siach To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Andy Gross , Bjorn Andersson Cc: Baruch Siach , Balaji Prakash J , Rob Herring , Robert Marko , Kathiravan T , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] dt-bindings: pwm: add IPQ6018 binding Date: Mon, 7 Feb 2022 11:30:44 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: <17dd231f496d09ed8502bdd505eaa77bb6637e4b.1644226245.git.baruch@tkos.co.il> References: <17dd231f496d09ed8502bdd505eaa77bb6637e4b.1644226245.git.baruch@tkos.co.il> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220207_013106_223842_2B6A6D45 X-CRM114-Status: GOOD ( 14.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Baruch Siach DT binding for the PWM block in Qualcomm IPQ6018 SoC. Signed-off-by: Baruch Siach Reviewed-by: Bjorn Andersson --- This series does not convert the TCSR binding documentation to YAML. As a result, this commit adds a new dt_binding_check warning: /example-0/syscon@1937000: failed to match any schema with compatible: ['qcom,tcsr-ipq 6018', 'syscon', 'simple-mfd'] If that is a blocker to IPQ6018 PWM support, so be it. Patches will wait for someone else to push them further. v10: No change v9: Add 'ranges' property to example (Rob) Drop label in example (Rob) v8: Add size cell to 'reg' (Rob) v7: Use 'reg' instead of 'offset' (Rob) Drop 'clock-names' and 'assigned-clock*' (Bjorn) Use single cell address/size in example node (Bjorn) Move '#pwm-cells' lower in example node (Bjorn) List 'reg' as required v6: Device node is child of TCSR; remove phandle (Rob Herring) Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König) v5: Use qcom,pwm-regs for phandle instead of direct regs (Bjorn Andersson, Kathiravan T) v4: Update the binding example node as well (Rob Herring's bot) v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) v2: Make #pwm-cells const (Rob Herring) --- .../devicetree/bindings/pwm/ipq-pwm.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/ipq-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml new file mode 100644 index 000000000000..857086ad539e --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/ipq-pwm.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/ipq-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IPQ6018 PWM controller + +maintainers: + - Baruch Siach + +properties: + "#pwm-cells": + const: 2 + + compatible: + const: qcom,ipq6018-pwm + + reg: + description: Offset of PWM register in the TCSR block. + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + +additionalProperties: false + +examples: + - | + #include + + syscon@1937000 { + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; + reg = <0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1937000 0x21000>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + }; + };