From patchwork Wed Jun 1 15:03:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Gardiner X-Patchwork-Id: 840562 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter2.kernel.org (8.14.4/8.14.3) with ESMTP id p51F6L07019440 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 1 Jun 2011 15:06:41 GMT Received: from canuck.infradead.org ([134.117.69.58]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRmxj-0005tx-Vc; Wed, 01 Jun 2011 15:04:00 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QRmxj-0005aA-Bi; Wed, 01 Jun 2011 15:03:59 +0000 Received: from na3sys009aog114.obsmtp.com ([74.125.149.211]) by canuck.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1QRmxO-0005YO-9e for linux-arm-kernel@lists.infradead.org; Wed, 01 Jun 2011 15:03:39 +0000 Received: from mail-qy0-f177.google.com ([209.85.216.177]) (using TLSv1) by na3sys009aob114.postini.com ([74.125.148.12]) with SMTP ID DSNKTeZUx6yiPSw2iezTHJ/UxTl4e/ATqZoT@postini.com; Wed, 01 Jun 2011 08:03:38 PDT Received: by mail-qy0-f177.google.com with SMTP id 38so5312180qyl.1 for ; Wed, 01 Jun 2011 08:03:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nanometrics.ca; s=google; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=PIlDgjM3B1MTFeh4uMnffBJmbbT/6i0DLyJVblNG0KU=; b=bJCZf8cm3/fchSvdab7+JfL1yUMPnu86zTQXgE2XEF+x1bEBcFKjMM3MUxj8Cr3krB +JQOK/t5n+GI/5sskY/lnwb2YMnTygBDBKdNDXGMVuQQXP58B6DhXRE0zhGzWoFl5OKY OpmVp8HRDmzi/Q0LO2UbZ/dhseAwGs6AxKbto= DomainKey-Signature: a=rsa-sha1; c=nofws; d=nanometrics.ca; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=EoylLShfadnQ7faiAfbP43wETcdiSO256bhcxsyGzCo2F2/34Rlp3UDidEeu8eRY/6 a9MP4+ds6wwDljj4BtA7GM+uNidcoDCC/43EDZbiOQXYApWas/nevIDtkSrS/Nd5AFt9 cganArEt4UplFVZY0F+1NM4NvtJpUze47ruqs= Received: by 10.229.101.36 with SMTP id a36mr5355583qco.74.1306940615226; Wed, 01 Jun 2011 08:03:35 -0700 (PDT) Received: from localhost.localdomain ([206.191.47.130]) by mx.google.com with ESMTPS id f16sm714512qck.33.2011.06.01.08.03.31 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 01 Jun 2011 08:03:33 -0700 (PDT) From: Ben Gardiner To: Sekhar Nori , davinci-linux-open-source@linux.davincidsp.com Subject: [PATCH 2/3] [v3] davinci: da850-dm646x: remove the SRAM_VIRT iotable entry Date: Wed, 1 Jun 2011 11:03:24 -0400 Message-Id: X-Mailer: git-send-email 1.7.4.1 In-Reply-To: References: <20110601051753.GA5153@game.jcrosoft.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110601_110338_709670_A7D57758 X-CRM114-Status: GOOD ( 15.46 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [74.125.149.211 listed in list.dnswl.org] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Subhasish Ghosh , Jean-Christophe PLAGNIOL-VILLARD , Russell King - ARM Linux , Sergei Shtylyov , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter2.kernel.org [140.211.167.43]); Wed, 01 Jun 2011 15:06:42 +0000 (UTC) The sram regions defined for da850-dm646x in their iotable entries are also defined in their davinci_soc_info's. Remove this duplicate information which is now uneccessary since sram init will ioremap the regions defined by their davinci_soc_info's. Since this removal completely removes all uses of SRAM_VIRT, also remove the SRAM_VIRT definition. Signed-off-by: Ben Gardiner Reviewed-by: Sergei Shtylyov Acked-by: Jean-Christophe PLAGNIOL-VILLARD --- Changes since v2: * Added Jean-Christophe PLAGNIOL-VILLARD's Ack Changes since v1: * squashed patches 3-8 in v1 series into this patch (Sergei Shtylyov) --- arch/arm/mach-davinci/da850.c | 6 ------ arch/arm/mach-davinci/dm355.c | 6 ------ arch/arm/mach-davinci/dm365.c | 6 ------ arch/arm/mach-davinci/dm644x.c | 6 ------ arch/arm/mach-davinci/dm646x.c | 6 ------ arch/arm/mach-davinci/include/mach/common.h | 2 -- 6 files changed, 0 insertions(+), 32 deletions(-) diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 5c2bf3b..904ede9 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -725,12 +725,6 @@ static struct map_desc da850_io_desc[] = { .length = DA8XX_CP_INTC_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), - .length = SZ_8K, - .type = MT_DEVICE - }, }; static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 9bda687..94f44d3 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -757,12 +757,6 @@ static struct map_desc dm355_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index d306034..58f5b0a 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -970,12 +970,6 @@ static struct map_desc dm365_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; static struct resource dm365_ks_resources[] = { diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 3949ed7..11e6481 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -663,12 +663,6 @@ static struct map_desc dm644x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00008000), - .length = SZ_16K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index a4365f7..57d697e 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -747,12 +747,6 @@ static struct map_desc dm646x_io_desc[] = { .length = IO_SIZE, .type = MT_DEVICE }, - { - .virtual = SRAM_VIRT, - .pfn = __phys_to_pfn(0x00010000), - .length = SZ_32K, - .type = MT_MEMORY_NONCACHED, - }, }; /* Contents of JTAG ID register used to identify exact cpu type */ diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 665d049..16b5ec5 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -86,8 +86,6 @@ extern struct davinci_soc_info davinci_soc_info; extern void davinci_common_init(struct davinci_soc_info *soc_info); extern void davinci_init_ide(void); -/* standard place to map on-chip SRAMs; they *may* support DMA */ -#define SRAM_VIRT 0xfffe0000 #define SRAM_SIZE SZ_128K #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */