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Signed-off-by: Baolin Wang --- arch/arm64/boot/dts/sprd/whale2.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/sprd/whale2.dtsi b/arch/arm64/boot/dts/sprd/whale2.dtsi index f2cdf4d..66a881e 100644 --- a/arch/arm64/boot/dts/sprd/whale2.dtsi +++ b/arch/arm64/boot/dts/sprd/whale2.dtsi @@ -107,6 +107,23 @@ }; }; + ap-ahb { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ap_dma: dma-controller@20100000 { + compatible = "sprd,sc9860-dma"; + reg = <0 0x20100000 0 0x4000>; + interrupts = ; + #dma-cells = <1>; + #dma-channels = <32>; + clock-names = "enable"; + clocks = <&apahb_gate CLK_DMA_EB>; + }; + }; + aon { compatible = "simple-bus"; #address-cells = <2>; @@ -151,6 +168,23 @@ clocks = <&aon_gate CLK_APCPU_WDG_EB>; }; }; + + agcp { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + agcp_dma: dma-controller@41580000 { + compatible = "sprd,sc9860-dma"; + reg = <0 0x41580000 0 0x4000>; + #dma-cells = <1>; + #dma-channels = <32>; + clock-names = "enable", "ashb_eb"; + clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>, + <&agcp_gate CLK_AGCP_AP_ASHB_EB>; + }; + }; }; ext_32k: ext_32k {