@@ -35,8 +35,11 @@ struct raspberrypi_clk {
struct device *dev;
struct rpi_firmware *firmware;
struct platform_device *cpufreq;
+};
- struct clk_hw pllb;
+struct raspberrypi_clk_data {
+ struct clk_hw hw;
+ struct raspberrypi_clk *rpi;
};
/*
@@ -80,8 +83,9 @@ static int raspberrypi_clock_property(struct rpi_firmware *firmware, u32 tag,
static int raspberrypi_fw_pll_is_on(struct clk_hw *hw)
{
- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk,
- pllb);
+ struct raspberrypi_clk_data *data =
+ container_of(hw, struct raspberrypi_clk_data, hw);
+ struct raspberrypi_clk *rpi = data->rpi;
u32 val = 0;
int ret;
@@ -98,8 +102,9 @@ static int raspberrypi_fw_pll_is_on(struct clk_hw *hw)
static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk,
- pllb);
+ struct raspberrypi_clk_data *data =
+ container_of(hw, struct raspberrypi_clk_data, hw);
+ struct raspberrypi_clk *rpi = data->rpi;
u32 val = 0;
int ret;
@@ -116,8 +121,9 @@ static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw,
static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long parent_rate)
{
- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk,
- pllb);
+ struct raspberrypi_clk_data *data =
+ container_of(hw, struct raspberrypi_clk_data, hw);
+ struct raspberrypi_clk *rpi = data->rpi;
u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
int ret;
@@ -168,10 +174,15 @@ static const struct clk_ops raspberrypi_firmware_pll_clk_ops = {
static int raspberrypi_register_pllb(struct raspberrypi_clk *rpi)
{
+ struct raspberrypi_clk_data *data;
struct clk_init_data init = {};
u32 min_rate = 0, max_rate = 0;
int ret;
+ data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+ data->rpi = rpi;
/* All of the PLLs derive from the external oscillator. */
init.parent_names = (const char *[]){ "osc" };
@@ -210,11 +221,11 @@ static int raspberrypi_register_pllb(struct raspberrypi_clk *rpi)
dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n",
min_rate, max_rate);
- rpi->pllb.init = &init;
+ data->hw.init = &init;
- ret = devm_clk_hw_register(rpi->dev, &rpi->pllb);
+ ret = devm_clk_hw_register(rpi->dev, &data->hw);
if (!ret)
- clk_hw_set_rate_range(&rpi->pllb,
+ clk_hw_set_rate_range(&data->hw,
min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE,
max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE);