From patchwork Fri Apr 4 10:10:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 3937631 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3FF1C9F1EE for ; Fri, 4 Apr 2014 10:12:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 64359203EB for ; Fri, 4 Apr 2014 10:12:52 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7EF00203EC for ; Fri, 4 Apr 2014 10:12:51 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WW163-0003oT-7H; Fri, 04 Apr 2014 10:11:39 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WW15s-0004rN-2N; Fri, 04 Apr 2014 10:11:28 +0000 Received: from comal.ext.ti.com ([198.47.26.152]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WW15X-0004oI-KY for linux-arm-kernel@lists.infradead.org; Fri, 04 Apr 2014 10:11:08 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s34AAfa1021148; Fri, 4 Apr 2014 05:10:41 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s34AAfOJ005593; Fri, 4 Apr 2014 05:10:41 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 4 Apr 2014 05:10:41 -0500 Received: from psplinux063.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s34AAWpX031341; Fri, 4 Apr 2014 05:10:39 -0500 From: Sekhar Nori To: Tony Lindgren Subject: [PATCH v2 3/3] ARM: OMAP2+: AM43x: L2 cache support Date: Fri, 4 Apr 2014 15:40:29 +0530 Message-ID: X-Mailer: git-send-email 1.7.10.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140404_061107_818553_8EC05A27 X-CRM114-Status: UNSURE ( 9.20 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.5 (-------) Cc: Russell King , Linux OMAP Mailing List , Sekhar Nori , Linux ARM Mailing List X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for L2 cache controller (PL310) on AM437x SoC. Signed-off-by: Sekhar Nori --- arch/arm/mach-omap2/Kconfig | 1 + arch/arm/mach-omap2/common.h | 1 + arch/arm/mach-omap2/io.c | 1 + arch/arm/mach-omap2/omap4-common.c | 8 ++++++++ 4 files changed, 11 insertions(+) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 1124155..1fd34d2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -65,6 +65,7 @@ config SOC_AM43XX select ARCH_HAS_OPP select ARM_GIC select MACH_OMAP_GENERIC + select MIGHT_HAVE_CACHE_L2X0 config SOC_DRA7XX bool "TI DRA7XX" diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index c64d5f5..fc59b49 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -93,6 +93,7 @@ extern void omap3_gptimer_timer_init(void); extern void omap4_local_timer_init(void); int omap4_l2_cache_init(void); extern void omap5_realtime_timer_init(void); +int am43xx_l2_cache_init(void); void omap2420_init_early(void); void omap2430_init_early(void); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 81bc89c..131c207 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -609,6 +609,7 @@ void __init am43xx_init_early(void) am43xx_clockdomains_init(); am43xx_hwmod_init(); omap_hwmod_init_postsetup(); + am43xx_l2_cache_init(); omap_clk_soc_init = am43xx_dt_clk_init; } diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index f8b8dac..6b2a056 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -224,6 +224,14 @@ int __init omap4_l2_cache_init(void) return omap_l2_cache_init(aux_ctrl, 0xc19fffff); } + +int __init am43xx_l2_cache_init(void) +{ + u32 aux_ctrl = L310_AUX_CTRL_DATA_PREFETCH | + L310_AUX_CTRL_INSTR_PREFETCH; + + return omap_l2_cache_init(aux_ctrl, 0xcfffffff); +} #endif void __iomem *omap4_get_sar_ram_base(void)