From patchwork Mon Jan 15 11:03:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13519531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7979C3DA79 for ; Mon, 15 Jan 2024 11:03:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iWJirAWISo4CEvMWYFiNe5Xb3QA2HKd8XUqn/8zmAH0=; b=tyU7zwKcsx/oDo rcj4I4KAh4SbappxfQPHXWc7xBgKnipod60K/zzr4yb/3DdgudoZCVEj7vtq8MopI8sVMBiFyJyre NHRz8VnD296N9orSK36NQLHfBB3YMx8cXHPwTc6mHr2pVbMz+u5aevOgSAfDGHA5zsueANbfQpbNY R24O6KAv5ob+FT3hQEgkemQU+7JtXu7F1sLDqUaWNvyGPFUVdgAxV2cbp+QRm5WM7RdMg7FbVaFop VFP3MRN3MrtAbhvu6IHSABFkcgmKDoJzfck9LuqPed4sZw6FW8f2fpvZiGjTZLjHp8J5CNM+VFAGz HPu1F8+Y50MkQwnqxHwA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rPKkZ-008dQA-2n; Mon, 15 Jan 2024 11:03:27 +0000 Received: from laurent.telenet-ops.be ([2a02:1800:110:4::f00:19]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rPKkQ-008dN0-1e for linux-arm-kernel@lists.infradead.org; Mon, 15 Jan 2024 11:03:21 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:1376:70aa:e074:32d3]) by laurent.telenet-ops.be with bizsmtp id az3A2B00P34Hgv901z3AbV; Mon, 15 Jan 2024 12:03:11 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1rPKjZ-00Fdgy-UW; Mon, 15 Jan 2024 12:03:10 +0100 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1rPKkI-00Bz8p-N9; Mon, 15 Jan 2024 12:03:10 +0100 From: Geert Uytterhoeven To: Magnus Damm Cc: Ulrich Hecht , linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH 2/3] ARM: dts: renesas: r8a73a4: Add cp clock Date: Mon, 15 Jan 2024 12:03:04 +0100 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240115_030318_707828_F8862611 X-CRM114-Status: GOOD ( 10.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the Common Peripheral (CP) clock, which is driven by the main clock / 2 during normal system operation, but may be driven by EXTALR during early system boot, when SYSCLK_EN is still low. As the latter is irrelevant to Linux, just model it as a fixed clock driven from main_div2_clk. Switch all users of main_div2_clk that are documented to be clocked by the CP clock to cp_clk, to better reflect the actual clock topology. Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/renesas/r8a73a4.dtsi | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi index b9c20e8ac14f2156..6847acaecc809eaa 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -727,6 +727,13 @@ main_div2_clk: main_div2 { clock-div = <2>; clock-mult = <1>; }; + cp_clk: cp { + compatible = "fixed-factor-clock"; + clocks = <&main_div2_clk>; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + }; pll0_div2_clk: pll0_div2 { compatible = "fixed-factor-clock"; clocks = <&cpg_clocks R8A73A4_CLK_PLL0>; @@ -792,9 +799,8 @@ R8A73A4_CLK_CMT1 mstp4_clks: mstp4_clks@e6150140 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; - clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>, - <&main_div2_clk>, - <&cpg_clocks R8A73A4_CLK_HP>, + clocks = <&cp_clk>, <&cpg_clocks R8A73A4_CLK_ZS>, + <&cp_clk>, <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks R8A73A4_CLK_HP>; #clock-cells = <1>; clock-indices = <